[PATCH V2 0/7] Add NSS clock controller support for IPQ9574

From: Devi Priya
Date: Fri Aug 25 2023 - 05:14:39 EST


Add bindings, driver and devicetree node for networking sub system clock
controller on IPQ9574. Also add support for NSS Huayra type alpha PLL and
add support for gpll0_out_aux clock which serves as the parent for
some nss clocks.

The NSS clock controller driver depends on the below patchset which adds
support for multiple configurations for same frequency.
https://lore.kernel.org/linux-arm-msm/20230531222654.25475-1-ansuelsmth@xxxxxxxxx/

Changes in V2:
- Detailed change logs are added to the respective patches.

V1 can be found at:
https://lore.kernel.org/linux-arm-msm/20230711093529.18355-1-quic_devipriy@xxxxxxxxxxx/

Devi Priya (7):
clk: qcom: clk-alpha-pll: Add NSS HUAYRA ALPHA PLL support for ipq9574
dt-bindings: clock: gcc-ipq9574: Add definition for GPLL0_OUT_AUX
clk: qcom: gcc-ipq9574: Add gpll0_out_aux clock
dt-bindings: clock: Add ipq9574 NSSCC clock and reset definitions
clk: qcom: Add NSS clock Controller driver for IPQ9574
arm64: dts: qcom: ipq9574: Add support for nsscc node
arm64: defconfig: Build NSS Clock Controller driver for IPQ9574

.../bindings/clock/qcom,ipq9574-nsscc.yaml | 107 +
arch/arm64/boot/dts/qcom/ipq9574.dtsi | 48 +
arch/arm64/configs/defconfig | 1 +
drivers/clk/qcom/Kconfig | 7 +
drivers/clk/qcom/Makefile | 1 +
drivers/clk/qcom/clk-alpha-pll.c | 12 +
drivers/clk/qcom/clk-alpha-pll.h | 1 +
drivers/clk/qcom/gcc-ipq9574.c | 16 +
drivers/clk/qcom/nsscc-ipq9574.c | 3109 +++++++++++++++++
include/dt-bindings/clock/qcom,ipq9574-gcc.h | 1 +
.../dt-bindings/clock/qcom,ipq9574-nsscc.h | 152 +
.../dt-bindings/reset/qcom,ipq9574-nsscc.h | 134 +
12 files changed, 3589 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/qcom,ipq9574-nsscc.yaml
create mode 100644 drivers/clk/qcom/nsscc-ipq9574.c
create mode 100644 include/dt-bindings/clock/qcom,ipq9574-nsscc.h
create mode 100644 include/dt-bindings/reset/qcom,ipq9574-nsscc.h

--
2.34.1