[PATCH v2 1/5] dt-bindings: remoteproc: k3-dsp: correct optional sram properties for AM62A SoCs

From: Hari Nagalla
Date: Wed Aug 09 2023 - 20:59:02 EST


The C7xv-dsp on AM62A have 32KB L1 I-cache and a 64KB L1 D-cache. It
does not have an addressable l1dram . So, remove this optional sram
property from the bindings to fix device tree build warnings.

Also set the 'memory-regions' property as optional. This is because
the remote processors can function without carveout regions.

Signed-off-by: Hari Nagalla <hnagalla@xxxxxx>
---
Changes since v1:
- Corrected dsp node binding doc file to fix yamllint warnings for am62a.

.../bindings/remoteproc/ti,k3-dsp-rproc.yaml | 16 ++++++++++++++--
1 file changed, 14 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml b/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml
index f16e90380df1..8dd22c57e22d 100644
--- a/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml
@@ -111,7 +111,6 @@ else:
properties:
compatible:
enum:
- - ti,am62a-c7xv-dsp
- ti,j721e-c71-dsp
- ti,j721s2-c71-dsp
then:
@@ -124,6 +123,20 @@ else:
items:
- const: l2sram
- const: l1dram
+ else:
+ if:
+ properties:
+ compatible:
+ enum:
+ - ti,am62a-c7xv-dsp
+ then:
+ properties:
+ reg:
+ items:
+ - description: Address and Size of the L2 SRAM internal memory region
+ reg-names:
+ items:
+ - const: l2sram

required:
- compatible
@@ -135,7 +148,6 @@ required:
- resets
- firmware-name
- mboxes
- - memory-region

unevaluatedProperties: false

--
2.34.1