Re: [PATCH v2] pinctrl: qcom: Add intr_target_width field to support increased number of interrupt targets

From: Ninad Naik
Date: Wed Aug 09 2023 - 05:57:43 EST




On 8/9/2023 2:36 AM, Andrew Halaney wrote:
On Tue, Jul 18, 2023 at 08:32:59AM -0700, Bjorn Andersson wrote:
On Tue, Jul 18, 2023 at 12:12:46PM +0530, Ninad Naik wrote:
SA8775 and newer target have added support for an increased number of
interrupt targets. To implement this change, the intr_target field, which
is used to configure the interrupt target in the interrupt configuration
register is increased from 3 bits to 4 bits.

In accordance to these updates, a new intr_target_width member is
introduced in msm_pingroup structure. This member stores the value of
width of intr_target field in the interrupt configuration register. This
value is used to dynamically calculate and generate mask for setting the
intr_target field. By default, this mask is set to 3 bit wide, to ensure
backward compatibility with the older targets.

Changes in v2 :
-----------------
- Changed initial definition of intr_target_mask variable to use GENMASK().
- Update commit subject appropiately.
- Add Fixes tag.
- v1 : https://lore.kernel.org/all/20230714061010.15817-1-quic_ninanaik@xxxxxxxxxxx/

Thanks for adding a good changelog, very much appreciated. The changelog
should be added below the '---' line though, as it typically don't add
value to the git history (except drivers/gpu/* which wants it here...).

Perhaps Linus can drop it as he applies the patch, no need to resubmit
unless he ask you to.

Thanks,
Bjorn


Gentle ping on this one... but then I realized that linusw isn't CC'ed
on this patch directly, and I'm unsure of what the workflow is for
pinctrl. ./scripts/get_maintainer.pl shows he should have been in the CC
list ideally :)

Maybe send a v3 with the changelog dropped from the actual message (i.e.
follow Bjorn's advice), and make sure to include the folks
get_maintainer tells you to so this gets picked up (or maybe just saying
Linus' name will make him appear out of the woodworks if we're lucky):
My bad on this one, I'll immediately send a v3 along with addressing the changelog suggestion mentioned by Bjorn.

ahalaney@fedora ~/git/linux-next (git)-[7de73ad15b73] % b4 am 20230718064246.12429-1-quic_ninanaik@xxxxxxxxxxx
Grabbing thread from lore.kernel.org/all/20230718064246.12429-1-quic_ninanaik@xxxxxxxxxxx/t.mbox.gz
Analyzing 3 messages in the thread
Checking attestation on all messages, may take a moment...
---
✓ [PATCH v2] pinctrl: qcom: Add intr_target_width field to support increased number of interrupt targets
---
✓ Signed: DKIM/quicinc.com
---
Total patches: 1
---
Link: https://lore.kernel.org/r/20230718064246.12429-1-quic_ninanaik@xxxxxxxxxxx
Base: applies clean to current tree
git checkout -b v2_20230718_quic_ninanaik_quicinc_com HEAD
git am ./v2_20230718_quic_ninanaik_pinctrl_qcom_add_intr_target_width_field_to_support_increased_number_of_in.mbx
ahalaney@fedora ~/git/linux-next (git)-[7de73ad15b73] % ./scripts/get_maintainer.pl ./v2_20230718_quic_ninanaik_pinctrl_qcom_add_intr_target_width_field_to_support_increased_number_of_in.mbx
Andy Gross <agross@xxxxxxxxxx> (maintainer:ARM/QUALCOMM SUPPORT)
Bjorn Andersson <andersson@xxxxxxxxxx> (maintainer:ARM/QUALCOMM SUPPORT)
Konrad Dybcio <konrad.dybcio@xxxxxxxxxx> (maintainer:ARM/QUALCOMM SUPPORT,blamed_fixes:1/1=100%)
Linus Walleij <linus.walleij@xxxxxxxxxx> (maintainer:PIN CONTROL SUBSYSTEM,blamed_fixes:1/1=100%)
Bartosz Golaszewski <bartosz.golaszewski@xxxxxxxxxx> (blamed_fixes:1/1=100%)
Yadu MG <quic_ymg@xxxxxxxxxxx> (blamed_fixes:1/1=100%)
Prasad Sodagudi <quic_psodagud@xxxxxxxxxxx> (blamed_fixes:1/1=100%)
linux-arm-msm@xxxxxxxxxxxxxxx (open list:ARM/QUALCOMM SUPPORT)
linux-gpio@xxxxxxxxxxxxxxx (open list:PIN CONTROL SUBSYSTEM)
linux-kernel@xxxxxxxxxxxxxxx (open list)
ahalaney@fedora ~/git/linux-next (git)-[7de73ad15b73] %

I'm eager to get this fix in so I can describe a missing IRQ or two
wrt ethernet GPIOs and submit that without stating the dependency
on this fix! :)

Thanks,
Andrew

Thanks,
Ninad