Re: [PATCH v6 1/2] soc: dt-bindings: add loongson-2 pm

From: Yinbo Zhu
Date: Thu Aug 03 2023 - 22:54:44 EST

在 2023/8/3 下午3:44, Arnd Bergmann 写道:
On Thu, Aug 3, 2023, at 08:37, Yinbo Zhu wrote:

+ loongson,suspend-address:
+ $ref: /schemas/types.yaml#/definitions/uint64
+ description:
+ The "loongson,suspend-address" is a deep sleep state (Suspend To
+ RAM) firmware entry address which was jumped from kernel and it's
+ value was dependent on specific platform firmware code. In
+ addition, the PM need according to it to indicate that current
+ SoC whether support Suspend To RAM.

I just commented on this in the driver patch, assuming this
was an MMIO address, but I'm even more confused now, since
we try hard to not rely on being able to just interface with
firmware like this.

If this is executable code, where does this actually reside?

Pmon firmware code.

Is this some SRAM that needs to execute the suspend logic
in order to shut down memory and cache controllers?

Yes, The suspend-to-ram after into pmon firmware code and set
self-refresh mode in memory controller and ensure that memory data is
not lost then shut down memory controller.

Or is
this a runtime firmware interface similar to how UEFI handles
its runtime services to keep the implementation out of
the kernel?

No, The main cpu and other cpu will offline that after into firmware and
finished Corresponding operations, the pmon firmware will not run.

Does the code work with both traditional suspend-to-ram and
modern suspend-to-idle logic?

Yes, It can support suspend-to-ram and suspend-to-idle.