Re: [PATCH] tty: serial: fsl_lpuart: Clear the error flags by writing 1 for lpuart32 platforms

From: gregkh@xxxxxxxxxxxxxxxxxxx
Date: Mon Jul 31 2023 - 11:13:23 EST


On Mon, Jul 31, 2023 at 05:50:46AM +0000, Sherry Sun wrote:
>
>
> > -----Original Message-----
> > From: Jiri Slaby <jirislaby@xxxxxxxxxx>
> > Sent: 2023年7月31日 13:24
> > To: Sherry Sun <sherry.sun@xxxxxxx>; gregkh@xxxxxxxxxxxxxxxxxxx;
> > tomonori.sakita@xxxxxxxxxx; atsushi.nemoto@xxxxxxxxxx
> > Cc: linux-serial@xxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx; dl-linux-imx
> > <linux-imx@xxxxxxx>
> > Subject: Re: [PATCH] tty: serial: fsl_lpuart: Clear the error flags by writing 1
> > for lpuart32 platforms
> >
> > On 31. 07. 23, 3:50, Sherry Sun wrote:
> > > Do not read the data register to clear the error flags for lpuart32
> > > platforms, the additional read may cause the receive FIFO underflow
> > > since the DMA has already read the data register.
> > > Now all lpuart32 platforms support write 1 to clear those error bits,
> >
> > What does this "Now" mean? Will this change break some older platforms?
>
> Hi Jiri,
>
> Sorry for the confusion, maybe the "Now" should be removed here. I can
> send a V2 to improve the commit message if needed.

Please do, thanks!

greg k-h