Re: [PATCH V5 1/3] firmware: qcom_scm: provide a read-modify-write function

From: Kathiravan T
Date: Sun Jul 23 2023 - 09:55:24 EST



On 7/22/2023 6:47 AM, Trilok Soni wrote:
On 7/20/2023 12:04 AM, Kathiravan T wrote:
From: Mukesh Ojha <quic_mojha@xxxxxxxxxxx>

It was realized by Srinivas K. that there is a need of read-modify-write
scm exported function so that it can be used by multiple clients.

Let's introduce qcom_scm_io_update_field() which masks out the bits and
write the passed value to that bit-offset.

Suggested-by: Srinivas Kandagatla <srinivas.kandagatla@xxxxxxxxxx>
Signed-off-by: Mukesh Ojha <quic_mojha@xxxxxxxxxxx>
Signed-off-by: Kathiravan T <quic_kathirav@xxxxxxxxxxx>
---
Changes in V5:
    - No changes

  drivers/firmware/qcom_scm.c            | 15 +++++++++++++++
  include/linux/firmware/qcom/qcom_scm.h |  2 ++
  2 files changed, 17 insertions(+)

diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c
index fde33acd46b7..104d86e49b97 100644
--- a/drivers/firmware/qcom_scm.c
+++ b/drivers/firmware/qcom_scm.c
@@ -407,6 +407,21 @@ int qcom_scm_set_remote_state(u32 state, u32 id)
  }
  EXPORT_SYMBOL(qcom_scm_set_remote_state);
  +int qcom_scm_io_update_field(phys_addr_t addr, unsigned int mask, unsigned int val)
+{
+    unsigned int old, new;
+    int ret;
+
+    ret = qcom_scm_io_readl(addr, &old);
+    if (ret)
+        return ret;
+
+    new = (old & ~mask) | (val & mask);
+
+    return qcom_scm_io_writel(addr, new);
+}
+EXPORT_SYMBOL(qcom_scm_io_update_field);

EXPORT_SYMBO_GPL please.


Sure, is it okay if I send the patch to convert the existing EXPORT_SYMBOL to EXPORT_SYMBOL_GPL as well?



+
  static int __qcom_scm_set_dload_mode(struct device *dev, bool enable)
  {
      struct qcom_scm_desc desc = {
diff --git a/include/linux/firmware/qcom/qcom_scm.h b/include/linux/firmware/qcom/qcom_scm.h
index 250ea4efb7cb..ca41e4eb33ad 100644
--- a/include/linux/firmware/qcom/qcom_scm.h
+++ b/include/linux/firmware/qcom/qcom_scm.h
@@ -84,6 +84,8 @@ extern bool qcom_scm_pas_supported(u32 peripheral);
    extern int qcom_scm_io_readl(phys_addr_t addr, unsigned int *val);
  extern int qcom_scm_io_writel(phys_addr_t addr, unsigned int val);
+extern int qcom_scm_io_update_field(phys_addr_t addr, unsigned int mask,
+                    unsigned int val);
    extern bool qcom_scm_restore_sec_cfg_available(void);
  extern int qcom_scm_restore_sec_cfg(u32 device_id, u32 spare);