[PATCH v1 1/2] arm64: dts: freescale: verdin-imx8mp: dahlia: add sound card

From: Francesco Dolcini
Date: Wed Jul 19 2023 - 08:54:41 EST


From: Francesco Dolcini <francesco.dolcini@xxxxxxxxxxx>

Add WM8904 based analog sound card to Dahlia carrier board.

Signed-off-by: Francesco Dolcini <francesco.dolcini@xxxxxxxxxxx>
---
.../dts/freescale/imx8mp-verdin-dahlia.dtsi | 56 ++++++++++++++++++-
1 file changed, 53 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-verdin-dahlia.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-verdin-dahlia.dtsi
index 56b0e4b865c9..7e9e4b13b5c5 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-verdin-dahlia.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-verdin-dahlia.dtsi
@@ -3,7 +3,36 @@
* Copyright 2022 Toradex
*/

-/* TODO: Audio Codec */
+/ {
+ sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,bitclock-master = <&codec_dai>;
+ simple-audio-card,format = "i2s";
+ simple-audio-card,frame-master = <&codec_dai>;
+ simple-audio-card,mclk-fs = <256>;
+ simple-audio-card,name = "imx8mp-wm8904";
+ simple-audio-card,routing =
+ "Headphone Jack", "HPOUTL",
+ "Headphone Jack", "HPOUTR",
+ "IN2L", "Line In Jack",
+ "IN2R", "Line In Jack",
+ "Headphone Jack", "MICBIAS",
+ "IN1L", "Headphone Jack";
+ simple-audio-card,widgets =
+ "Microphone", "Headphone Jack",
+ "Headphone", "Headphone Jack",
+ "Line", "Line In Jack";
+
+ codec_dai: simple-audio-card,codec {
+ clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI1_MCLK1>;
+ sound-dai = <&wm8904_1a>;
+ };
+
+ simple-audio-card,cpu {
+ sound-dai = <&sai1>;
+ };
+ };
+};

&backlight {
power-supply = <&reg_3p3v>;
@@ -64,7 +93,21 @@ &i2c3 {
&i2c4 {
status = "okay";

- /* TODO: Audio Codec */
+ /* Audio Codec */
+ wm8904_1a: audio-codec@1a {
+ compatible = "wlf,wm8904";
+ reg = <0x1a>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sai1>;
+ #sound-dai-cells = <0>;
+ clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI1_MCLK1>;
+ clock-names = "mclk";
+ AVDD-supply = <&reg_1p8v>;
+ CPVDD-supply = <&reg_1p8v>;
+ DBVDD-supply = <&reg_1p8v>;
+ DCVDD-supply = <&reg_1p8v>;
+ MICVDD-supply = <&reg_1p8v>;
+ };
};

/* Verdin PCIE_1 */
@@ -95,7 +138,14 @@ &reg_usdhc2_vmmc {
vin-supply = <&reg_3p3v>;
};

-/* TODO: Verdin I2S_1 */
+/* Verdin I2S_1 */
+&sai1 {
+ assigned-clocks = <&clk IMX8MP_CLK_SAI1>;
+ assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>;
+ assigned-clock-rates = <24576000>;
+ fsl,sai-mclk-direction-output;
+ status = "okay";
+};

/* Verdin UART_1 */
&uart1 {
--
2.25.1