Re: [PATCH 3/3] dt-bindings: usb: dwc2: add compatible "intel,socfpga-stratix10-hsotg"

[Krzysztof Kozlowski]

On 19/07/2023 10:45, Li, Meng wrote:
> 
> 
>> -----Original Message-----
>> From: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
>> Sent: Wednesday, July 19, 2023 2:39 PM
>> To: Li, Meng <Meng.Li@xxxxxxxxxxxxx>; gregkh@xxxxxxxxxxxxxxxxxxx;
>> robh+dt@xxxxxxxxxx; krzysztof.kozlowski+dt@xxxxxxxxxx; conor+dt@xxxxxxxxxx;
>> dinguyen@xxxxxxxxxx; hminas@xxxxxxxxxxxx; linux-usb@xxxxxxxxxxxxxxx;
>> devicetree@xxxxxxxxxxxxxxx
>> Cc: linux-kernel@xxxxxxxxxxxxxxx
>> Subject: Re: [PATCH 3/3] dt-bindings: usb: dwc2: add compatible "intel,socfpga-
>> stratix10-hsotg"
>>
>> CAUTION: This email comes from a non Wind River email account!
>> Do not click links or open attachments unless you recognize the sender and
>> know the content is safe.
>>
>> On 19/07/2023 04:55, Meng Li wrote:
>>> Add the compatible "intel,socfpga-stratix10-hsotg" to the DWC2
>>> implementation, because the Stratix DWC2 implementation does not
>>> support clock gating. This compatible is used with generic snps,dwc2.
>>>
>>> Signed-off-by: Meng Li <Meng.Li@xxxxxxxxxxxxx>
>>
>> Missing changelog, missing versioning. This is v3 or v4.
>>
>>> ---
>>>  Documentation/devicetree/bindings/usb/dwc2.yaml | 1 +
>>>  1 file changed, 1 insertion(+)
>>>
>>> diff --git a/Documentation/devicetree/bindings/usb/dwc2.yaml
>>> b/Documentation/devicetree/bindings/usb/dwc2.yaml
>>> index dc4988c0009c..f90094320914 100644
>>> --- a/Documentation/devicetree/bindings/usb/dwc2.yaml
>>> +++ b/Documentation/devicetree/bindings/usb/dwc2.yaml
>>> @@ -51,6 +51,7 @@ properties:
>>>                - amlogic,meson-g12a-usb
>>>                - amlogic,meson-a1-usb
>>>                - intel,socfpga-agilex-hsotg
>>> +              - intel,socfpga-stratix10-hsotg
>>
>> So you just sent the same patch as before. I pointed you to the proper solution
>> with compatibility.
>>
> 
> No. not the same.
> I don't understand why SoC specific compatible "intel,socfpga-agilex-hsotg" is able to be added, but the SoC specific compatible "intel,socfpga-stratix10-hsotg" is not allowed.
> 
> You said "Where is SoC specific compatible?"
> Now, I add the SoC specific compatible "intel,socfpga-stratix10-hsotg", but why it is still not reasonable.

The compatible should be added, but I said they are compatible, so
express it. I also gave you example of file which expresses it.

Why that compatible is not allowed alone? Because what we said here
many, many times and because the doc I gave you which explains this.

Best regards,
Krzysztof