[PATCH 1/2] dt-bindings: arm: Add qcom specific hvc transport for SCMI

[Nikunj Kela]

Introduce compatible "qcom,scmi-hvc-shmem" for SCMI
transport channel for Qualcomm virtual platforms.
The compatible mandates a shared memory channel.

Signed-off-by: Nikunj Kela <quic_nkela@xxxxxxxxxxx>
---
 .../bindings/firmware/arm,scmi.yaml           | 69 +++++++++++++++++++
 1 file changed, 69 insertions(+)

diff --git a/Documentation/devicetree/bindings/firmware/arm,scmi.yaml b/Documentation/devicetree/bindings/firmware/arm,scmi.yaml
index b138f3d23df8..605b1e997a85 100644
--- a/Documentation/devicetree/bindings/firmware/arm,scmi.yaml
+++ b/Documentation/devicetree/bindings/firmware/arm,scmi.yaml
@@ -45,6 +45,9 @@ properties:
       - description: SCMI compliant firmware with OP-TEE transport
         items:
           - const: linaro,scmi-optee
+      - description: SCMI compliant firmware with Qualcomm hvc/shmem transport
+        items:
+          - const: qcom,scmi-hvc-shmem
 
   interrupts:
     description:
@@ -321,6 +324,16 @@ else:
       required:
         - linaro,optee-channel-id
 
+    else:
+      if:
+        properties:
+          compatible:
+            contains:
+              const: qcom,scmi-hvc-shmem
+      then:
+        required:
+          - shmem
+
 examples:
   - |
     firmware {
@@ -444,6 +457,62 @@ examples:
         };
     };
 
+  - |
+    firmware {
+        scmi_dpu {
+            compatible = "qcom,scmi-hvc-shmem";
+            shmem = <&shmem_dpu>;
+
+            #address-cells = <1>;
+            #size-cells = <0>;
+
+            scmi_pd_dpu: protocol@11 {
+                reg = <0x11>;
+                #power-domain-cells = <1>;
+            };
+        };
+
+        scmi_gpu {
+            compatible = "qcom,scmi-hvc-shmem";
+            shmem = <&shmem_gpu>;
+
+            interrupts = <GIC_SPI 931 IRQ_TYPE_EDGE_RISING>;
+            interrupt-names = "a2p";
+
+            #address-cells = <1>;
+            #size-cells = <0>;
+
+            scmi_pd_gpu: protocol@11 {
+                reg = <0x11>;
+                #power-domain-cells = <1>;
+            };
+        };
+    };
+
+    soc {
+        #address-cells = <1>;
+        #size-cells = <1>;
+
+        sram@95c00000 {
+            compatible = "mmio-sram";
+            reg = <0x95c00000 0x10000>;
+
+            #address-cells = <1>;
+            #size-cells = <1>;
+            ranges;
+
+            shmem_dpu: scmi-sram-dpu@95c00000 {
+                compatible = "arm,scmi-shmem";
+                reg = <0x95c00000 0x3f0>;
+            };
+
+            shmem_gpu: scmi-sram-gpu@95c00400 {
+                compatible = "arm,scmi-shmem";
+                reg = <0x95c00400 0x3f0>;
+            };
+        };
+    };
+
   - |
     firmware {
         scmi {
-- 
2.17.1