Re: [PATCH 09/10] x86/virt/tdx: Wire up basic SEAMCALL functions

[Huang, Kai]

On Thu, 2023-07-13 at 07:51 -0700, Sean Christopherson wrote:
> On Thu, Jul 13, 2023, Kai Huang wrote:
> > On Thu, 2023-07-13 at 09:42 +0200, Peter Zijlstra wrote:
> > > On Thu, Jul 13, 2023 at 03:46:52AM +0000, Huang, Kai wrote:
> > > > On Wed, 2023-07-12 at 15:15 -0700, Isaku Yamahata wrote:
> > > > > > The SEAMCALL ABI is very similar to the TDCALL ABI and leverages much
> > > > > > TDCALL infrastructure.� Wire up basic functions to make SEAMCALLs for
> > > > > > the basic TDX support: __seamcall(), __seamcall_ret() and
> > > > > > __seamcall_saved_ret() which is for TDH.VP.ENTER leaf function.
> > > > > 
> > > > > Hi.� __seamcall_saved_ret() uses struct tdx_module_arg as input and output.� For
> > > > > KVM TDH.VP.ENTER case, those arguments are already in unsigned long
> > > > > kvm_vcpu_arch::regs[].� It's silly to move those values twice.� From
> > > > > kvm_vcpu_arch::regs to tdx_module_args.� From tdx_module_args to real registers.
> > > > > 
> > > > > If TDH.VP.ENTER is the only user of __seamcall_saved_ret(), can we make it to
> > > > > take unsigned long kvm_vcpu_argh::regs[NR_VCPU_REGS]?� Maybe I can make the
> > > > > change with TDX KVM patch series.
> > > > 
> > > > The assembly code assumes the second argument is a pointer to 'struct
> > > > tdx_module_args'.  I don't know how can we change __seamcall_saved_ret() to
> > > > achieve what you said.  We might change the kvm_vcpu_argh::regs[NR_VCPU_REGS] to
> > > > match 'struct tdx_module_args''s layout and manually convert part of "regs" to
> > > > the structure and pass to __seamcall_saved_ret(), but it's too hacky I suppose.
> > > 
> > > I suspect the kvm_vcpu_arch::regs layout is given by hardware; so the
> > > only option would be to make tdx_module_args match that. It's a slightly
> > > unfortunate layout, but meh.
> > > 
> > > Then you can simply do:
> > > 
> > > 	__seamcall_saved_ret(leaf, (struct tdx_module_args *)vcpu->arch->regs);
> > > 
> > > 
> > 
> > I don't think the layout matches hardware, especially I think there's no
> > "hardware layout" for GPRs that are concerned here.  They are just for KVM
> > itself to save guest's registers when the guest exits to KVM, so that KVM can
> > restore them when returning back to the guest.
> 
> kvm_vcpu_arch::regs does follow the hardware-defined indices, and that's required
> for myriad emulation flows, e.g. saving GPRs into SMRAM, anywhere KVM gets a GPR
> index from an instruction opcode or vmcs.VMX_INSTRUCTION_INFO, etc.

Yes.  Sorry I missed this.  I forgot x86 uses "index register" and does have a
"hardware layout".

	IndexReg:
	0 = RAX
	1 = RCX
	2 = RDX
	3 = RBX
	4 = RSP
	5 = RBP
	6 = RSI
	7 = RDI
	8–15 represent R8–R15, respectively...