Re: [PATCH 1/1] iio: imu: adis16475.c: Add delta angle and delta velocity channels
From: Jonathan Cameron
Date: Sun Jul 16 2023 - 10:04:39 EST
On Thu, 13 Jul 2023 08:57:34 +0200
Nuno Sá <noname.nuno@xxxxxxxxx> wrote:
> On Wed, 2023-07-12 at 10:50 +0300, Ramona Bolboaca wrote:
> > Add delta angle and delta velocity channels to adis16475 driver.
> > All supported devices offer the capabilities to read this data
> > by performing raw register reads.
> >
> > Signed-off-by: Ramona Bolboaca <ramona.bolboaca@xxxxxxxxxx>
> > ---
>
> To note that for some devices (like adis1505) these channels can also be buffered
> (not together with normal accel and gyro data) so we should support it as we have
> everything needed. I honestly think it should be done right now but it would be a
> more complex change, yes. Anyways, I don't feel too strong about it, so:
Sounds like multiple buffer support needed etc, so definitely a bigger change.
>
> Reviewed-by: Nuno Sa <nuno.sa@xxxxxxxxxx>
>
> (ABI related, we're also not completely sure IIO_ROT is a perfect fit but hopefully
> good enough).
That's a good point. ROT is used in two ways previously:
1) Rotation from magnetic / true north
2) Quaternion absolute rotation.
A delta value like this isn't even close to the same. In fact, given I assume
this operates when the device is self clocking, they seem to be rotation in
a fixed time - (so in units, scaled version of radians per second - where scale
involves the sampling period).
That unit set is same as anglvel which we already have from the gyroscope
(though as an instantaneous measurement)
I guess the intent here is that a driver would probably 'sum' the values from
each sample from the fifo to establish what we'd expect from IIO_ROT channels
(rotation wrt some fixed location) We could do that - but then you'd need
to support the buffer. That raises the question - is this useful without
buffered support? Is it helpful to know a single reading from this?
In their raw form I'm not sure what is a good way to represent these. They
aren't IIO_ROT and they aren't IIO_ANG_VEL.
Much as I don't like adding them with out good reason I think we may need a new
channel type for this.
Same applies to delta velocity.
>
> > drivers/iio/imu/adis16475.c | 88 +++++++++++++++++++++++++++++++++++++
> > 1 file changed, 88 insertions(+)
> >
> > diff --git a/drivers/iio/imu/adis16475.c b/drivers/iio/imu/adis16475.c
> > index 3abffb01ba31..84bee9e155bd 100644
> > --- a/drivers/iio/imu/adis16475.c
> > +++ b/drivers/iio/imu/adis16475.c
> > @@ -31,6 +31,12 @@
> > #define ADIS16475_REG_Y_ACCEL_L 0x14
> > #define ADIS16475_REG_Z_ACCEL_L 0x18
> > #define ADIS16475_REG_TEMP_OUT 0x1c
> > +#define ADIS16475_REG_X_DELTANG_L 0x24
> > +#define ADIS16475_REG_Y_DELTANG_L 0x28
> > +#define ADIS16475_REG_Z_DELTANG_L 0x2C
> > +#define ADIS16475_REG_X_DELTVEL_L 0x30
> > +#define ADIS16475_REG_Y_DELTVEL_L 0x34
> > +#define ADIS16475_REG_Z_DELTVEL_L 0x38
> > #define ADIS16475_REG_X_GYRO_BIAS_L 0x40
> > #define ADIS16475_REG_Y_GYRO_BIAS_L 0x44
> > #define ADIS16475_REG_Z_GYRO_BIAS_L 0x48
> > @@ -90,6 +96,8 @@ struct adis16475_chip_info {
> > u32 accel_max_val;
> > u32 accel_max_scale;
> > u32 temp_scale;
> > + u32 deltang_max_val;
> > + u32 deltvel_max_val;
> > u32 int_clk;
> > u16 max_dec;
> > u8 num_sync;
> > @@ -453,6 +461,14 @@ static int adis16475_read_raw(struct iio_dev *indio_dev,
> > case IIO_TEMP:
> > *val = st->info->temp_scale;
> > return IIO_VAL_INT;
> > + case IIO_ROT:
> > + *val = st->info->deltang_max_val;
> > + *val2 = 31;
> > + return IIO_VAL_FRACTIONAL_LOG2;
> > + case IIO_VELOCITY:
> > + *val = st->info->deltvel_max_val;
> > + *val2 = 31;
> > + return IIO_VAL_FRACTIONAL_LOG2;
> > default:
> > return -EINVAL;
> > }
> > @@ -553,6 +569,32 @@ static int adis16475_write_raw(struct iio_dev *indio_dev,
> > }, \
> > }
> >
> > +#define ADIS16475_MOD_CHAN_DELTA(_type, _mod, _address, _r_bits, _s_bits) { \
> > + .type = (_type), \
> > + .modified = 1, \
> > + .channel2 = (_mod), \
> > + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
> > + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
> > + .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
> > + BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), \
> > + .address = (_address), \
> > + .scan_index = -1, \
> > + .scan_type = { \
> > + .sign = 's', \
> > + .realbits = (_r_bits), \
> > + .storagebits = (_s_bits), \
> > + .endianness = IIO_BE, \
> > + }, \
> > + }
> > +
> > +#define ADIS16475_DELTANG_CHAN(_mod) \
> > + ADIS16475_MOD_CHAN_DELTA(IIO_ROT, IIO_MOD_ ## _mod, \
> > + ADIS16475_REG_ ## _mod ## _DELTANG_L, 32, 32)
> > +
> > +#define ADIS16475_DELTVEL_CHAN(_mod) \
> > + ADIS16475_MOD_CHAN_DELTA(IIO_VELOCITY, IIO_MOD_ ## _mod, \
> > + ADIS16475_REG_ ## _mod ## _DELTVEL_L, 32, 32)
> > +
> > static const struct iio_chan_spec adis16475_channels[] = {
> > ADIS16475_GYRO_CHANNEL(X),
> > ADIS16475_GYRO_CHANNEL(Y),
> > @@ -561,6 +603,12 @@ static const struct iio_chan_spec adis16475_channels[] = {
> > ADIS16475_ACCEL_CHANNEL(Y),
> > ADIS16475_ACCEL_CHANNEL(Z),
> > ADIS16475_TEMP_CHANNEL(),
> > + ADIS16475_DELTANG_CHAN(X),
> > + ADIS16475_DELTANG_CHAN(Y),
> > + ADIS16475_DELTANG_CHAN(Z),
> > + ADIS16475_DELTVEL_CHAN(X),
> > + ADIS16475_DELTVEL_CHAN(Y),
> > + ADIS16475_DELTVEL_CHAN(Z),
> > IIO_CHAN_SOFT_TIMESTAMP(7)
> > };
> >
> > @@ -664,6 +712,8 @@ static const struct adis16475_chip_info adis16475_chip_info[] =
> > {
> > .accel_max_val = 1,
> > .accel_max_scale = IIO_M_S_2_TO_G(800 << 16),
> > .temp_scale = 100,
> > + .deltang_max_val = 2160,
> > + .deltvel_max_val = 400,
> > .int_clk = 2000,
> > .max_dec = 1999,
> > .sync = adis16475_sync_mode,
> > @@ -679,6 +729,8 @@ static const struct adis16475_chip_info adis16475_chip_info[] =
> > {
> > .accel_max_val = 1,
> > .accel_max_scale = IIO_M_S_2_TO_G(4000 << 16),
> > .temp_scale = 100,
> > + .deltang_max_val = 360,
> > + .deltvel_max_val = 100,
> > .int_clk = 2000,
> > .max_dec = 1999,
> > .sync = adis16475_sync_mode,
> > @@ -694,6 +746,8 @@ static const struct adis16475_chip_info adis16475_chip_info[] =
> > {
> > .accel_max_val = 1,
> > .accel_max_scale = IIO_M_S_2_TO_G(4000 << 16),
> > .temp_scale = 100,
> > + .deltang_max_val = 720,
> > + .deltvel_max_val = 100,
> > .int_clk = 2000,
> > .max_dec = 1999,
> > .sync = adis16475_sync_mode,
> > @@ -709,6 +763,8 @@ static const struct adis16475_chip_info adis16475_chip_info[] =
> > {
> > .accel_max_val = 1,
> > .accel_max_scale = IIO_M_S_2_TO_G(4000 << 16),
> > .temp_scale = 100,
> > + .deltang_max_val = 2160,
> > + .deltvel_max_val = 100,
> > .int_clk = 2000,
> > .max_dec = 1999,
> > .sync = adis16475_sync_mode,
> > @@ -724,6 +780,8 @@ static const struct adis16475_chip_info adis16475_chip_info[] =
> > {
> > .accel_max_val = 1,
> > .accel_max_scale = IIO_M_S_2_TO_G(800 << 16),
> > .temp_scale = 100,
> > + .deltang_max_val = 360,
> > + .deltvel_max_val = 400,
> > .int_clk = 2000,
> > .max_dec = 1999,
> > .sync = adis16475_sync_mode,
> > @@ -739,6 +797,8 @@ static const struct adis16475_chip_info adis16475_chip_info[] =
> > {
> > .accel_max_val = 1,
> > .accel_max_scale = IIO_M_S_2_TO_G(800 << 16),
> > .temp_scale = 100,
> > + .deltang_max_val = 720,
> > + .deltvel_max_val = 400,
> > .int_clk = 2000,
> > .max_dec = 1999,
> > .sync = adis16475_sync_mode,
> > @@ -754,6 +814,8 @@ static const struct adis16475_chip_info adis16475_chip_info[] =
> > {
> > .accel_max_val = 1,
> > .accel_max_scale = IIO_M_S_2_TO_G(800 << 16),
> > .temp_scale = 100,
> > + .deltang_max_val = 2160,
> > + .deltvel_max_val = 400,
> > .int_clk = 2000,
> > .max_dec = 1999,
> > .sync = adis16475_sync_mode,
> > @@ -769,6 +831,8 @@ static const struct adis16475_chip_info adis16475_chip_info[] =
> > {
> > .accel_max_val = 1,
> > .accel_max_scale = IIO_M_S_2_TO_G(4000 << 16),
> > .temp_scale = 100,
> > + .deltang_max_val = 360,
> > + .deltvel_max_val = 100,
> > .int_clk = 2000,
> > .max_dec = 1999,
> > .sync = adis16475_sync_mode,
> > @@ -784,6 +848,8 @@ static const struct adis16475_chip_info adis16475_chip_info[] =
> > {
> > .accel_max_val = 1,
> > .accel_max_scale = IIO_M_S_2_TO_G(4000 << 16),
> > .temp_scale = 100,
> > + .deltang_max_val = 720,
> > + .deltvel_max_val = 100,
> > .int_clk = 2000,
> > .max_dec = 1999,
> > .sync = adis16475_sync_mode,
> > @@ -799,6 +865,8 @@ static const struct adis16475_chip_info adis16475_chip_info[] =
> > {
> > .accel_max_val = 1,
> > .accel_max_scale = IIO_M_S_2_TO_G(4000 << 16),
> > .temp_scale = 100,
> > + .deltang_max_val = 2160,
> > + .deltvel_max_val = 100,
> > .int_clk = 2000,
> > .max_dec = 1999,
> > .sync = adis16475_sync_mode,
> > @@ -814,6 +882,8 @@ static const struct adis16475_chip_info adis16475_chip_info[] =
> > {
> > .accel_max_val = 1,
> > .accel_max_scale = IIO_M_S_2_TO_G(800 << 16),
> > .temp_scale = 100,
> > + .deltang_max_val = 360,
> > + .deltvel_max_val = 400,
> > .int_clk = 2000,
> > .max_dec = 1999,
> > .sync = adis16475_sync_mode,
> > @@ -829,6 +899,8 @@ static const struct adis16475_chip_info adis16475_chip_info[] =
> > {
> > .accel_max_val = 1,
> > .accel_max_scale = IIO_M_S_2_TO_G(800 << 16),
> > .temp_scale = 100,
> > + .deltang_max_val = 720,
> > + .deltvel_max_val = 400,
> > .int_clk = 2000,
> > .max_dec = 1999,
> > .sync = adis16475_sync_mode,
> > @@ -844,6 +916,8 @@ static const struct adis16475_chip_info adis16475_chip_info[] =
> > {
> > .accel_max_val = 1,
> > .accel_max_scale = IIO_M_S_2_TO_G(800 << 16),
> > .temp_scale = 100,
> > + .deltang_max_val = 2160,
> > + .deltvel_max_val = 400,
> > .int_clk = 2000,
> > .max_dec = 1999,
> > .sync = adis16475_sync_mode,
> > @@ -859,6 +933,8 @@ static const struct adis16475_chip_info adis16475_chip_info[] =
> > {
> > .accel_max_val = 392,
> > .accel_max_scale = 32000 << 16,
> > .temp_scale = 100,
> > + .deltang_max_val = 2160,
> > + .deltvel_max_val = 400,
> > .int_clk = 2000,
> > .max_dec = 1999,
> > .sync = adis16475_sync_mode,
> > @@ -876,6 +952,8 @@ static const struct adis16475_chip_info adis16475_chip_info[] =
> > {
> > .accel_max_val = 78,
> > .accel_max_scale = 32000 << 16,
> > .temp_scale = 100,
> > + .deltang_max_val = 360,
> > + .deltvel_max_val = 100,
> > .int_clk = 2000,
> > .max_dec = 1999,
> > .sync = adis16475_sync_mode,
> > @@ -893,6 +971,8 @@ static const struct adis16475_chip_info adis16475_chip_info[] =
> > {
> > .accel_max_val = 78,
> > .accel_max_scale = 32000 << 16,
> > .temp_scale = 100,
> > + .deltang_max_val = 720,
> > + .deltvel_max_val = 100,
> > .int_clk = 2000,
> > .max_dec = 1999,
> > .sync = adis16475_sync_mode,
> > @@ -910,6 +990,8 @@ static const struct adis16475_chip_info adis16475_chip_info[] =
> > {
> > .accel_max_val = 78,
> > .accel_max_scale = 32000 << 16,
> > .temp_scale = 100,
> > + .deltang_max_val = 2160,
> > + .deltvel_max_val = 100,
> > .int_clk = 2000,
> > .max_dec = 1999,
> > .sync = adis16475_sync_mode,
> > @@ -927,6 +1009,8 @@ static const struct adis16475_chip_info adis16475_chip_info[]
> > = {
> > .accel_max_val = 392,
> > .accel_max_scale = 32000 << 16,
> > .temp_scale = 100,
> > + .deltang_max_val = 360,
> > + .deltvel_max_val = 400,
> > .int_clk = 2000,
> > .max_dec = 1999,
> > .sync = adis16475_sync_mode,
> > @@ -944,6 +1028,8 @@ static const struct adis16475_chip_info adis16475_chip_info[]
> > = {
> > .accel_max_val = 392,
> > .accel_max_scale = 32000 << 16,
> > .temp_scale = 100,
> > + .deltang_max_val = 720,
> > + .deltvel_max_val = 400,
> > .int_clk = 2000,
> > .max_dec = 1999,
> > .sync = adis16475_sync_mode,
> > @@ -961,6 +1047,8 @@ static const struct adis16475_chip_info adis16475_chip_info[]
> > = {
> > .accel_max_val = 392,
> > .accel_max_scale = 32000 << 16,
> > .temp_scale = 100,
> > + .deltang_max_val = 2160,
> > + .deltvel_max_val = 400,
> > .int_clk = 2000,
> > .max_dec = 1999,
> > .sync = adis16475_sync_mode,
>