Re: [PATCH 07/10] x86/tdx: Extend TDX_MODULE_CALL to support more TDCALL/SEAMCALL leafs

[Peter Zijlstra]

On Thu, Jul 13, 2023 at 08:02:54AM +0000, Huang, Kai wrote:

> Sorry I am ignorant here.  Won't "clearing ECX only" leave high bits of
> registers still containing guest's value?

architecture zero-extends 32bit stores

> I see KVM code uses:
> 
>         xor %eax, %eax
>         xor %ecx, %ecx
>         xor %edx, %edx
>         xor %ebp, %ebp
>         xor %esi, %esi
>         xor %edi, %edi
> #ifdef CONFIG_X86_64
>         xor %r8d,  %r8d
>         xor %r9d,  %r9d
>         xor %r10d, %r10d
>         xor %r11d, %r11d
>         xor %r12d, %r12d
>         xor %r13d, %r13d
>         xor %r14d, %r14d
>         xor %r15d, %r15d
> #endif
> 
> Which makes sense because KVM wants to support 32-bit too.

Encoding for the first lot is shorter, the 64bit regs obviously need the
RAX byte anyway.

> However for TDX is 64-bit only.
> 
> And I also see the current TDVMCALL code has:
> 
>         xor %r8d,  %r8d
>         xor %r9d,  %r9d
>         xor %r10d, %r10d                                                       
>         xor %r11d, %r11d                                                       
>         xor %rdi,  %rdi                                                        
>         xor %rdx,  %rdx
> 
> Why does it need to use "d" postfix for all r* registers?

That's the name of the 32bit subword, r#[bwd] for byte, word,
double-word. SDM v1 3.7.2.1 has the whole list, I couldn't quicky find
one for the zero-extention thing.

> Sorry for those questions but I struggled when I wrote those assembly and am
> hoping to get my mind cleared on this. :-)

No problem.