RE: [PATCH v10 3/7] iommu/vt-d: Add domain_flush_pasid_iotlb()

[Tian, Kevin]

> From: Jacob Pan <jacob.jun.pan@xxxxxxxxxxxxxxx>
> Sent: Thursday, July 13, 2023 12:34 AM
> 
> From: Lu Baolu <baolu.lu@xxxxxxxxxxxxxxx>
> 
> The VT-d spec requires to use PASID-based-IOTLB invalidation descriptor
> to invalidate IOTLB and the paging-structure caches for a first-stage
> page table. Add a generic helper to do this.
> 
> RID2PASID is used if the domain has been attached to a physical device,
> otherwise real PASIDs that the domain has been attached to will be used.

this should mention that 'real' PASID attach is not handled in this patch.
Otherwise it's confusing to connect this description to the new helper.

> 
> Signed-off-by: Lu Baolu <baolu.lu@xxxxxxxxxxxxxxx>
> Signed-off-by: Jacob Pan <jacob.jun.pan@xxxxxxxxxxxxxxx>
> ---
>  drivers/iommu/intel/iommu.c | 22 ++++++++++++++++++++--
>  1 file changed, 20 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
> index ddff43def3ab..40685cbfaf0e 100644
> --- a/drivers/iommu/intel/iommu.c
> +++ b/drivers/iommu/intel/iommu.c
> @@ -1467,6 +1467,24 @@ static void iommu_flush_dev_iotlb(struct
> dmar_domain *domain,
>  	spin_unlock_irqrestore(&domain->lock, flags);
>  }
> 
> +/*
> + * The VT-d spec requires to use PASID-based-IOTLB Invalidation to
> + * invalidate IOTLB and the paging-structure-caches for a first-stage
> + * page table.
> + */

this comment is better placed in the calling point. This function has
nothing explicitly connected to first-stage.

with that fixed,

Reviewed-by: Kevin Tian <kevin.tian@xxxxxxxxx>