Re: [PATCH V5 2/3] dt-bindings: PCI: xilinx-xdma: Add YAML schemas for Xilinx XDMA PCIe Root Port Bridge

From: Rob Herring
Date: Wed Jun 28 2023 - 11:49:25 EST



On Wed, 28 Jun 2023 14:58:11 +0530, Thippeswamy Havalige wrote:
> Add YAML dtschemas of Xilinx XDMA Soft IP PCIe Root Port Bridge
> dt binding.
>
> Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@xxxxxxx>
> Signed-off-by: Bharat Kumar Gogada <bharat.kumar.gogada@xxxxxxx>
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
> ---
> change in v5:
> Modified uppercase case hex value to lower case.
> change in v4:
> - Removed unnecessary space.
> changes in v3:
> - Fixed compatible string issue.
> - Modified ranges property description to maxItems.
> - Modified address-cell property of interrupt-controller child node.
> changes in v2:
> - None
> .../bindings/pci/xlnx,xdma-host.yaml | 114 ++++++++++++++++++
> 1 file changed, 114 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pci/xlnx,xdma-host.yaml
>

Acked-by: Rob Herring <robh@xxxxxxxxxx>