Re: [PATCH v2] riscv: Discard vector state on syscalls

[Björn Töpel]

Björn Töpel <bjorn@xxxxxxxxxx> writes:

> Björn Töpel <bjorn@xxxxxxxxxx> writes:
>
>> From: Björn Töpel <bjorn@xxxxxxxxxxxx>
>>
>> The RISC-V vector specification states:
>>   Executing a system call causes all caller-saved vector registers
>>   (v0-v31, vl, vtype) and vstart to become unspecified.
>
> A bit of a corner case, but this will make sigreturn syscalls discard
> the vector state as well.
>
> Is that an issue? E.g. a user cannot build userspace context switching
> application. Does arm64 SVE handle sigreturn in a special way?

NVM; My bad. The vector state is cleared on *entry*, but then the
registers passed on signal stack is restored as usual.

Sorry for the noise! We're all good!
Björn