Re: Invalid event (cycles:pp) in per-thread mode, enable system wide with '-a'.

[Ravi Bangoria]

Hi Nick,

On 23-Jun-23 9:53 PM, Nick Desaulniers wrote:
> On Tue, Oct 11, 2022 at 10:05 PM Ravi Bangoria <ravi.bangoria@xxxxxxx> wrote:
>>
>> On 12-Oct-22 9:36 AM, Ravi Bangoria wrote:
>>> On 12-Oct-22 3:02 AM, Nick Desaulniers wrote:
>>>> On Thu, Oct 6, 2022 at 8:56 PM Ravi Bangoria <ravi.bangoria@xxxxxxx> wrote:
>>>>>
>>>>> +cc: PeterZ
>>>>>
>>>>>>>>>> +Ravi who may be able to say if there are any issues with the precise
>>>>>>>>>> sampling on AMD.
>>>>>>>>>
>>>>>>>>> Afaik cvcles:pp will use IBS but it doesn't support per-task profiling
>>>>>>>>> since it has no task context.  Ravi is working on it..
>>>>>>>>
>>>>>>>> Right.
>>>>>>>> https://lore.kernel.org/lkml/20220829113347.295-1-ravi.bangoria@xxxxxxx
>>>>>>>
>>>>>>> Cool, thanks for working on this Ravi.
>>>>>>>
>>>>>>> I'm not sure yet whether I may replace the kernel on my corporate
>>>>>>> provided workstation, so I'm not sure yet I can help test that patch.
>>>>>>>
>>>>>>> Can you confirm that
>>>>>>> $ perf record -e cycles:pp --freq=128 --call-graph lbr -- <command to profile>
>>>>>>>
>>>>>>> works with just that patch applied? Or is there more work required?
>>>>>>> What is the status of that patch?
>>>>>>>
>>>>>>> For context, we had difficulty upstreaming support for instrumentation
>>>>>>> based profile guided optimizations in the Linux kernel.
>>>>>>> https://lore.kernel.org/lkml/CAHk-=whqCT0BeqBQhW8D-YoLLgp_eFY=8Y=9ieREM5xx0ef08w@xxxxxxxxxxxxxx/
>>>>>>> We'd like to be able to use either instrumentation or sampling to
>>>>>>> optimize our builds.  The major barrier to sample based approaches are
>>>>>>> architecture / micro architecture issues with sample based profile
>>>>>>> data collection, and bitrot of data processing utilities.
>>>>>>> https://github.com/google/autofdo/issues/144
>>>>>>
>>>>>> On existing AMD Zen2, Zen3 the following cmdline:
>>>>>> $ perf record -e cycles:pp --freq=128 --call-graph lbr -- <command to profile>
>>>>>>
>>>>>> does not work. I see two reasons:
>>>>>>
>>>>>> 1. cycles:pp is likely converted into IBS op in cycle mode.
>>>>>>     Current kernels do not support IBS in per-thread mode.
>>>>>>     This is purely a kernel limitation
>>>>>
>>>>> Right, it's purely a kernel limitation. And below simple patch on top
>>>>> of event-context rewrite patch[1] should be sufficient to make cycles:pp
>>>>> working in per-process mode on AMD Zen.
>>>>>
>>>>> ---
>>>>> diff --git a/arch/x86/events/amd/ibs.c b/arch/x86/events/amd/ibs.c
>>>>> index c251bc44c088..de01b5d27e40 100644
>>>>> --- a/arch/x86/events/amd/ibs.c
>>>>> +++ b/arch/x86/events/amd/ibs.c
>>>>> @@ -665,7 +665,7 @@ static struct perf_ibs perf_ibs_fetch = {
>>>>>
>>>>>  static struct perf_ibs perf_ibs_op = {
>>>>>         .pmu = {
>>>>> -               .task_ctx_nr    = perf_invalid_context,
>>>>> +               .task_ctx_nr    = perf_hw_context,
>>>>>
>>>>>                 .event_init     = perf_ibs_init,
>>>>>                 .add            = perf_ibs_add,
>>>>> ---
>>>>>
>>>>> [1]: https://lore.kernel.org/lkml/20220829113347.295-1-ravi.bangoria@xxxxxxx
>>>>
>>>> Hi Ravi,
>>>> I didn't see the above diff in
>>>> https://lore.kernel.org/lkml/20221008062424.313-1-ravi.bangoria@xxxxxxx/
>>>> Was there another distinct patch you were going to send for the above?
>>>
>>> Yes Nick. I was planning to send it once the rewrite stuff goes in.
>>
>> Hi Nick,
>>
>> Since you have practical use case, would it be possible to run your workflow
>> with perf rewrite and IBS patches applied? It will help us in finding/fixing
>> more bugs and upstreaming these changes.
> 
> Hi Ravi,
> Sorry, I'm not able to load a custom kernel image on my employer
> provided workstation, and I never got approval to expense hardware for
> testing this otherwise.
> 
> Was there ever any update on this? I'm on 6.1.25 now and still cant run
> $ perf record -e cycles:pp --call-graph lbr <any command to profile>

Per-process precise sampling on AMD platforms should work from 6.2-rc1
onward. However, --call-graph=lbr is not supported on AMD (hw limitation).

Thanks,
Ravi