[RFC PATCH 4/6] riscv: add support for SBI misalignment trap delegation

From: Clément Léger
Date: Sat Jun 24 2023 - 08:21:21 EST


Add support for misalignment trap delegation by setting it with
SBI_EXT_FW_FEATURE SBI extension. This extension allows to control SBI
behavior by requesting to set them to specific value. In order to
implement prctl(PR_SET_UNALIGN, PR_UNALIGN_SIGBUS) behavior properly, we
need to let the kernel handle the misalignment error by itself. This
commit adds the sbi_delegate_misaligned() function to check if the SBI
delegated us the misalignement handling. The value returned by this
function is initialize at init time from sbi_init().

Signed-off-by: Clément Léger <cleger@xxxxxxxxxxxx>
---
arch/riscv/include/asm/sbi.h | 12 ++++++++++++
arch/riscv/kernel/sbi.c | 28 ++++++++++++++++++++++++++++
2 files changed, 40 insertions(+)

diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
index 5b4a1bf5f439..97c2b5d6abff 100644
--- a/arch/riscv/include/asm/sbi.h
+++ b/arch/riscv/include/asm/sbi.h
@@ -30,6 +30,7 @@ enum sbi_ext_id {
SBI_EXT_HSM = 0x48534D,
SBI_EXT_SRST = 0x53525354,
SBI_EXT_PMU = 0x504D55,
+ SBI_EXT_FW_FEATURE = 0x46574654,

/* Experimentals extensions must lie within this range */
SBI_EXT_EXPERIMENTAL_START = 0x08000000,
@@ -236,6 +237,16 @@ enum sbi_pmu_ctr_type {
/* Flags defined for counter stop function */
#define SBI_PMU_STOP_FLAG_RESET (1 << 0)

+/* SBI function IDs for FW feature extension */
+#define SBI_EXT_FW_FEATURE_SET 0x0
+#define SBI_EXT_FW_FEATURE_GET 0x1
+
+enum sbi_fw_features_t {
+ SBI_FW_FEATURE_MISALIGNED_DELEG = 0,
+
+ SBI_FW_FEATURE_MAX,
+};
+
#define SBI_SPEC_VERSION_DEFAULT 0x1
#define SBI_SPEC_VERSION_MAJOR_SHIFT 24
#define SBI_SPEC_VERSION_MAJOR_MASK 0x7f
@@ -269,6 +280,7 @@ int sbi_console_getchar(void);
long sbi_get_mvendorid(void);
long sbi_get_marchid(void);
long sbi_get_mimpid(void);
+bool sbi_delegate_misaligned(void);
void sbi_set_timer(uint64_t stime_value);
void sbi_shutdown(void);
void sbi_send_ipi(unsigned int cpu);
diff --git a/arch/riscv/kernel/sbi.c b/arch/riscv/kernel/sbi.c
index c672c8ba9a2a..18effd9e6ea9 100644
--- a/arch/riscv/kernel/sbi.c
+++ b/arch/riscv/kernel/sbi.c
@@ -22,6 +22,8 @@ static int (*__sbi_rfence)(int fid, const struct cpumask *cpu_mask,
unsigned long start, unsigned long size,
unsigned long arg4, unsigned long arg5) __ro_after_init;

+static bool __sbi_misaligned_deleg __ro_after_init;
+
struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0,
unsigned long arg1, unsigned long arg2,
unsigned long arg3, unsigned long arg4,
@@ -342,6 +344,11 @@ static int __sbi_rfence_v02(int fid, const struct cpumask *cpu_mask,
return 0;
}

+bool sbi_delegate_misaligned(void)
+{
+ return __sbi_misaligned_deleg;
+}
+
/**
* sbi_set_timer() - Program the timer for next timer event.
* @stime_value: The value after which next timer event should fire.
@@ -494,6 +501,16 @@ int sbi_remote_hfence_vvma_asid(const struct cpumask *cpu_mask,
}
EXPORT_SYMBOL(sbi_remote_hfence_vvma_asid);

+static int sbi_fw_feature_set(enum sbi_fw_features_t feature, bool set)
+{
+ struct sbiret ret;
+
+ ret = sbi_ecall(SBI_EXT_FW_FEATURE, SBI_EXT_FW_FEATURE_SET, feature,
+ set, 0, 0, 0, 0);
+
+ return sbi_err_map_linux_errno(ret.error);
+}
+
static void sbi_srst_reset(unsigned long type, unsigned long reason)
{
sbi_ecall(SBI_EXT_SRST, SBI_EXT_SRST_RESET, type, reason,
@@ -624,6 +641,17 @@ void __init sbi_init(void)
sbi_srst_reboot_nb.priority = 192;
register_restart_handler(&sbi_srst_reboot_nb);
}
+ /*
+ * TODO: this will likely need to be updated when SBI extension
+ * is ratified
+ */
+ if ((sbi_spec_version >= sbi_mk_version(1, 0)) &&
+ (sbi_probe_extension(SBI_EXT_FW_FEATURE) > 0)) {
+ pr_info("SBI FW_FEATURE extension detected\n");
+ if (!sbi_fw_feature_set(SBI_FW_FEATURE_MISALIGNED_DELEG,
+ true))
+ __sbi_misaligned_deleg = true;
+ }
} else {
__sbi_set_timer = __sbi_set_timer_v01;
__sbi_send_ipi = __sbi_send_ipi_v01;
--
2.40.1