Re: [PATCH net-next 1/6] platform/x86: intel_pmc_core: Add IPC mailbox accessor function and add SoC register access

From: Choong Yong Liang
Date: Fri Jun 23 2023 - 01:54:41 EST


Hi Simon,

Yes, you are right. I will add static in v2. Thank you.

On 22/6/2023 10:41 pm, Simon Horman wrote:
On Thu, Jun 22, 2023 at 12:19:00PM +0800, Choong Yong Liang wrote:
From: "David E. Box" <david.e.box@xxxxxxxxxxxxxxx>

- Exports intel_pmc_core_ipc() for host access to the PMC IPC mailbox
- Add support to use IPC command allows host to access SoC registers
through PMC firmware that are otherwise inaccessible to the host due to
security policies.

Signed-off-by: David E. Box <david.e.box@xxxxxxxxxxxxxxx>
Signed-off-by: Chao Qin <chao.qin@xxxxxxxxx>
Signed-off-by: Choong Yong Liang <yong.liang.choong@xxxxxxxxxxxxxxx>

...

diff --git a/drivers/platform/x86/intel/pmc/core.c b/drivers/platform/x86/intel/pmc/core.c
index da6e7206d38b..0d60763c5144 100644
--- a/drivers/platform/x86/intel/pmc/core.c
+++ b/drivers/platform/x86/intel/pmc/core.c
@@ -16,6 +16,7 @@
#include <linux/delay.h>
#include <linux/dmi.h>
#include <linux/io.h>
+#include <linux/intel_pmc_core.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/slab.h>
@@ -26,7 +27,9 @@
#include <asm/msr.h>
#include <asm/tsc.h>
-#include "core.h"
+#define PMC_IPCS_PARAM_COUNT 7
+
+static const struct x86_cpu_id *pmc_cpu_id;
/* Maximum number of modes supported by platfoms that has low power mode capability */
const char *pmc_lpm_modes[] = {

Hi Choong Yong Liang,

It looks like pmc_lpm_mode is used in this file and, as of this patch,
has no declaration. Should it be static?

...

diff --git a/drivers/platform/x86/intel/pmc/core.h b/include/linux/intel_pmc_core.h
similarity index 95%
rename from drivers/platform/x86/intel/pmc/core.h
rename to include/linux/intel_pmc_core.h
index 9ca9b9746719..82810e8b92a2 100644
--- a/drivers/platform/x86/intel/pmc/core.h
+++ b/include/linux/intel_pmc_core.h
@@ -250,7 +250,16 @@ enum ppfear_regs {
#define MTL_LPM_STATUS_OFFSET 0x1700
#define MTL_LPM_LIVE_STATUS_OFFSET 0x175C
-extern const char *pmc_lpm_modes[];
+#define IPC_SOC_REGISTER_ACCESS 0xAA
+#define IPC_SOC_SUB_CMD_READ 0x00
+#define IPC_SOC_SUB_CMD_WRITE 0x01
+
+struct pmc_ipc_cmd {
+ u32 cmd;
+ u32 sub_cmd;
+ u32 size;
+ u32 wbuf[4];
+};
struct pmc_bit_map {
const char *name;

...