Re: [PATCH v6 27/27] PCI/AER: Unmask RCEC internal errors to enable RCH downstream port error handling

From: Jonathan Cameron
Date: Thu Jun 22 2023 - 09:07:44 EST


On Wed, 21 Jun 2023 22:51:26 -0500
Terry Bowman <terry.bowman@xxxxxxx> wrote:

> From: Robert Richter <rrichter@xxxxxxx>
>
> AER corrected and uncorrectable internal errors (CIE/UIE) are masked
> in their corresponding mask registers per default once in power-up
> state. [1][2] Enable internal errors for RCECs to receive CXL
> downstream port errors of Restricted CXL Hosts (RCHs).
>
> [1] CXL 3.0 Spec, 12.2.1.1 - RCH Downstream Port Detected Errors
> [2] PCIe Base Spec r6.0, 7.8.4.3 Uncorrectable Error Mask Register,
> 7.8.4.6 Correctable Error Mask Register
>
> Co-developed-by: Terry Bowman <terry.bowman@xxxxxxx>
> Signed-off-by: Terry Bowman <terry.bowman@xxxxxxx>
> Signed-off-by: Robert Richter <rrichter@xxxxxxx>
> Acked-by: Bjorn Helgaas <bhelgaas@xxxxxxxxxx>

Trivial suggestion inline. Either way

Reviewed-by: Jonathan Cameron <Jonathan.Cameron@xxxxxxxxxx>


>
> +static int handles_cxl_error_iter(struct pci_dev *dev, void *data)
> +{
> + int *handles_cxl = data;
> +
> + if (!*handles_cxl)
> + *handles_cxl = is_cxl_mem_dev(dev) && cxl_error_is_native(dev);

All bools, why not make handles_cxl a bool and avoid need for !! below?

> +
> + /* Non-zero terminates iteration */
> + return *handles_cxl;
> +}
> +
> +static bool handles_cxl_errors(struct pci_dev *rcec)
> +{
> + int handles_cxl = 0;
> +
> + if (pci_pcie_type(rcec) == PCI_EXP_TYPE_RC_EC &&
> + pcie_aer_is_native(rcec))
> + pcie_walk_rcec(rcec, handles_cxl_error_iter, &handles_cxl);
> +
> + return !!handles_cxl;

This is the one you can get rid of the !! on if you make handles_cxl a bool.

> +}