RE: [PATCH 1/1] net: axienet: Move reset before DMA detection

From: Pandey, Radhey Shyam
Date: Wed Jun 21 2023 - 08:23:52 EST


> -----Original Message-----
> From: Maxim Kochetkov <fido_max@xxxxxxxx>
> Sent: Wednesday, June 21, 2023 4:57 PM
> To: netdev@xxxxxxxxxxxxxxx
> Cc: Maxim Kochetkov <fido_max@xxxxxxxx>; Pandey, Radhey Shyam
> <radhey.shyam.pandey@xxxxxxx>; David S. Miller
> <davem@xxxxxxxxxxxxx>; Eric Dumazet <edumazet@xxxxxxxxxx>; Jakub
> Kicinski <kuba@xxxxxxxxxx>; Paolo Abeni <pabeni@xxxxxxxxxx>; Simek,
> Michal <michal.simek@xxxxxxx>; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx;
> linux-kernel@xxxxxxxxxxxxxxx
> Subject: [PATCH 1/1] net: axienet: Move reset before DMA detection
>
> DMA detection will fail if axinet was started before (by boot loader, boot
> ROM, etc). In this state axinet will not start properly.
> So move axinet reset before DMA detection.

Please provide more detail on the failing testcase. In which scenario we are
seeing DMA detection failure? What is error log . Is it random?

>
> Signed-off-by: Maxim Kochetkov <fido_max@xxxxxxxx>
> ---
> drivers/net/ethernet/xilinx/xilinx_axienet_main.c | 10 +++++-----
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
> b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
> index 3e310b55bce2..734822321e0a 100644
> --- a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
> +++ b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
> @@ -2042,6 +2042,11 @@ static int axienet_probe(struct platform_device
> *pdev)
> goto cleanup_clk;
> }
>
> + /* Reset core now that clocks are enabled, prior to accessing MDIO
> */
> + ret = __axienet_device_reset(lp);
> + if (ret)
> + goto cleanup_clk;
> +
> /* Autodetect the need for 64-bit DMA pointers.
> * When the IP is configured for a bus width bigger than 32 bits,
> * writing the MSB registers is mandatory, even if they are all 0.
> @@ -2096,11 +2101,6 @@ static int axienet_probe(struct platform_device
> *pdev)
> lp->coalesce_count_tx = XAXIDMA_DFT_TX_THRESHOLD;
> lp->coalesce_usec_tx = XAXIDMA_DFT_TX_USEC;
>
> - /* Reset core now that clocks are enabled, prior to accessing MDIO
> */
> - ret = __axienet_device_reset(lp);
> - if (ret)
> - goto cleanup_clk;
> -
> ret = axienet_mdio_setup(lp);
> if (ret)
> dev_warn(&pdev->dev,
> --
> 2.40.1