Re: [PATCH V7 17/23] mmc: sdhci-uhs2: add uhs2_control() to initialise the interface

[Victor Shih]

Hi, Adrian

On Wed, Apr 12, 2023 at 9:14 PM Adrian Hunter <adrian.hunter@xxxxxxxxx> wrote:
>
> On 31/03/23 13:55, Victor Shih wrote:
> > This is a sdhci version of mmc's uhs2_set_reg operation.
> > UHS-II interface (related registers) will be initialised here.
> >
> > Signed-off-by: Ben Chuang <ben.chuang@xxxxxxxxxxxxxxxxxxx>
> > Signed-off-by: AKASHI Takahiro <takahiro.akashi@xxxxxxxxxx>
> > Signed-off-by: Victor Shih <victor.shih@xxxxxxxxxxxxxxxxxxx>
> > ---
> >  drivers/mmc/host/sdhci-uhs2.c | 89 +++++++++++++++++++++++++++++++++++
> >  1 file changed, 89 insertions(+)
> >
> > diff --git a/drivers/mmc/host/sdhci-uhs2.c b/drivers/mmc/host/sdhci-uhs2.c
> > index 71ac76065886..6fe394b1a7be 100644
> > --- a/drivers/mmc/host/sdhci-uhs2.c
> > +++ b/drivers/mmc/host/sdhci-uhs2.c
> > @@ -278,6 +278,49 @@ static void __sdhci_uhs2_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
> >       sdhci_set_clock(host, host->clock);
> >  }
> >
> > +static void sdhci_uhs2_set_config(struct sdhci_host *host)
> > +{
> > +     u32 value;
> > +     u16 sdhci_uhs2_set_ptr = sdhci_readw(host, SDHCI_UHS2_SETTINGS_PTR);
> > +     u16 sdhci_uhs2_gen_set_reg = (sdhci_uhs2_set_ptr + 0);
> > +     u16 sdhci_uhs2_phy_set_reg = (sdhci_uhs2_set_ptr + 4);
> > +     u16 sdhci_uhs2_tran_set_reg = (sdhci_uhs2_set_ptr + 8);
> > +     u16 sdhci_uhs2_tran_set_1_reg = (sdhci_uhs2_set_ptr + 12);
>
> Perhaps line these up and lose the parentheses.
>
>         u16 sdhci_uhs2_gen_set_reg    = sdhci_uhs2_set_ptr;
>         u16 sdhci_uhs2_phy_set_reg    = sdhci_uhs2_set_ptr + 4;
>         u16 sdhci_uhs2_tran_set_reg   = sdhci_uhs2_set_ptr + 8;
>         u16 sdhci_uhs2_tran_set_1_reg = sdhci_uhs2_set_ptr + 12;
>

I will update it to the V8 version.

> > +
> > +     /* Set Gen Settings */
> > +     value = FIELD_PREP(SDHCI_UHS2_GEN_SETTINGS_N_LANES_MASK, host->mmc->uhs2_caps.n_lanes_set);
> > +     sdhci_writel(host, value, sdhci_uhs2_gen_set_reg);
> > +
> > +     /* Set PHY Settings */
> > +     value = FIELD_PREP(SDHCI_UHS2_PHY_N_LSS_DIR_MASK, host->mmc->uhs2_caps.n_lss_dir_set) |
> > +             FIELD_PREP(SDHCI_UHS2_PHY_N_LSS_SYN_MASK, host->mmc->uhs2_caps.n_lss_sync_set);
> > +     if (host->mmc->ios.timing == MMC_TIMING_UHS2_SPEED_B ||
> > +         host->mmc->ios.timing == MMC_TIMING_UHS2_SPEED_B_HD)
> > +             value |= SDHCI_UHS2_PHY_SET_SPEED_B;
> > +     sdhci_writel(host, value, sdhci_uhs2_phy_set_reg);
> > +
> > +     /* Set LINK-TRAN Settings */
> > +     value = FIELD_PREP(SDHCI_UHS2_TRAN_RETRY_CNT_MASK, host->mmc->uhs2_caps.max_retry_set) |
> > +             FIELD_PREP(SDHCI_UHS2_TRAN_N_FCU_MASK, host->mmc->uhs2_caps.n_fcu_set);
> > +     sdhci_writel(host, value, sdhci_uhs2_tran_set_reg);
> > +     sdhci_writel(host, host->mmc->uhs2_caps.n_data_gap_set, sdhci_uhs2_tran_set_1_reg);
> > +}
> > +
> > +static int sdhci_uhs2_check_dormant(struct sdhci_host *host)
> > +{
> > +     u32 val;
> > +     /* 100ms */
> > +     int timeout = 100000;
> > +
> > +     if (read_poll_timeout_atomic(sdhci_readl, val, (val & SDHCI_UHS2_IN_DORMANT_STATE),
> > +                                  100, timeout, true, host, SDHCI_PRESENT_STATE)) {
>
> atomic not needed
>

I will update it to the V8 version.

> > +             pr_warn("%s: UHS2 IN_DORMANT fail in 100ms.\n", mmc_hostname(host->mmc));
> > +             sdhci_dumpregs(host);
> > +             return -EIO;
> > +     }
> > +     return 0;
> > +}
> > +
> >  /*****************************************************************************\
> >   *                                                                           *
> >   * MMC callbacks                                                             *
> > @@ -360,6 +403,51 @@ static int sdhci_uhs2_enable_clk(struct mmc_host *mmc)
> >       return 0;
> >  }
> >
> > +static int sdhci_uhs2_do_detect_init(struct mmc_host *mmc);
> > +
> > +static int sdhci_uhs2_control(struct mmc_host *mmc, enum sd_uhs2_operation op)
> > +{
> > +     struct sdhci_host *host = mmc_priv(mmc);
> > +     struct mmc_ios *ios = &mmc->ios;
> > +     int err = 0;
> > +
> > +     DBG("Begin uhs2 control, act %d.\n", op);
> > +
> > +     switch (op) {
> > +     case UHS2_PHY_INIT:
> > +             err = sdhci_uhs2_do_detect_init(mmc);
> > +             break;
> > +     case UHS2_SET_CONFIG:
> > +             sdhci_uhs2_set_config(host);
> > +             break;
> > +     case UHS2_ENABLE_INT:
> > +             sdhci_uhs2_clear_set_irqs(host, 0, SDHCI_INT_CARD_INT);
> > +             break;
> > +     case UHS2_DISABLE_INT:
> > +             sdhci_uhs2_clear_set_irqs(host, SDHCI_INT_CARD_INT, 0);
> > +             break;
> > +     case UHS2_CHECK_DORMANT:
> > +             err = sdhci_uhs2_check_dormant(host);
> > +             break;
> > +     case UHS2_DISABLE_CLK:
> > +             err = sdhci_uhs2_disable_clk(mmc);
> > +             break;
> > +     case UHS2_ENABLE_CLK:
> > +             err = sdhci_uhs2_enable_clk(mmc);
> > +             break;
> > +     case UHS2_SET_IOS:
> > +             err = sdhci_uhs2_set_ios(mmc, ios);
> > +             break;
> > +     default:
> > +             pr_err("%s: input sd uhs2 operation %d is wrong!\n",
> > +                    mmc_hostname(host->mmc), op);
> > +             err = -EIO;
> > +             break;
> > +     }
> > +
> > +     return err;
> > +}
> > +
> >  /*****************************************************************************\
> >   *                                                                           *
> >   * Driver init/exit                                                          *
> > @@ -487,6 +575,7 @@ static int sdhci_uhs2_host_ops_init(struct sdhci_host *host)
> >  {
> >       host->mmc_host_ops.start_signal_voltage_switch =
> >               sdhci_uhs2_start_signal_voltage_switch;
> > +     host->mmc_host_ops.uhs2_control = sdhci_uhs2_control;
> >
> >       return 0;
> >  }
>

Thanks, Victor Shih