Re: [patch v3 1/7] x86/smp: Make stop_other_cpus() more robust

[Ashok Raj]

On Fri, Jun 16, 2023 at 09:53:25AM +0200, Thomas Gleixner wrote:
> On Thu, Jun 15 2023 at 18:58, Ashok Raj wrote:
> > On Thu, Jun 15, 2023 at 10:33:50PM +0200, Thomas Gleixner wrote:
> >> +			dm = apic->dest_mode_logical ? APIC_DEST_LOGICAL : APIC_DEST_PHYSICAL;
> >> +			dm |= APIC_DM_NMI;
> >> +
> >> +			for_each_cpu(cpu, &cpus_stop_mask) {
> >> +				u32 apicid = apic->cpu_present_to_apicid(cpu);
> >> +
> >> +				apic_icr_write(dm, apicid);
> >> +				apic_wait_icr_idle();
> >
> > can we simplify this by just apic->send_IPI(cpu, NMI_VECTOR); ??
> 
> That would not set APIC_DM_NMI in delivery mode and the IPI would be
> sent with APIC_DM_FIXED.

That's correct. 

Maybe if we use apic->send_IPI_mask(cpumask_of(cpu), NMI_VECTOR)

apic->send_IPI_mask(cpumask_of(cpu),NMI_VECTOR)
   __x2apic_send_IPI_mask() 
      __x2apic_send_IPI_dest()
	  unsigned long cfg = __prepare_ICR(0, vector, dest);
	  native_x2apic_icr_write(cfg, apicid);

__prepare_ICR() seems to have the magic for APIC_DM_NMI?

I suppose this works for non-x2apic parts as well

Cheers,
Ashok