On 6/15/23 3:16 PM, Yanfei Xu wrote:Got it! Will improve these in commit message.
Even the PCI devices don't support pasid capability, PASID
table is mandatory for a PCI device in scalable mode. However
flushing cache of pasid directory table for these devices are
not taken after pasid table is allocated as the "size" of
table is zero. Fix to assign it with a page size.
Documentation/process/submitting-patches.rst
Please add more information about
- Describe your problem.
- Any background of the problem?
- How your change fixes the problem.
...
Fixes: 194b3348bdbb ("iommu/vt-d: Fix PASID directory pointer coherency")
Do you need a Cc stable?
A little difference that real size may less than memory size calculated by
Signed-off-by: Yanfei Xu <yanfei.xu@xxxxxxxxx>
---
drivers/iommu/intel/pasid.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/iommu/intel/pasid.c b/drivers/iommu/intel/pasid.c
index c5d479770e12..bde7df055865 100644
--- a/drivers/iommu/intel/pasid.c
+++ b/drivers/iommu/intel/pasid.c
@@ -115,7 +115,9 @@ int intel_pasid_alloc_table(struct device *dev)
intel_pasid_max_id);
size = max_pasid >> (PASID_PDE_SHIFT - 3);
- order = size ? get_order(size) : 0;
+ if (!size)
+ size = PAGE_SIZE;
+ order = get_order(size);
pages = alloc_pages_node(info->iommu->node,
GFP_KERNEL | __GFP_ZERO, order);
if (!pages) {
Is it similar to
diff --git a/drivers/iommu/intel/pasid.c b/drivers/iommu/intel/pasid.c
index c5d479770e12..49fc5a038a14 100644
--- a/drivers/iommu/intel/pasid.c
+++ b/drivers/iommu/intel/pasid.c
@@ -129,7 +129,7 @@ int intel_pasid_alloc_table(struct device *dev)
info->pasid_table = pasid_table;
if (!ecap_coherent(info->iommu->ecap))
- clflush_cache_range(pasid_table->table, size);
+ clflush_cache_range(pasid_table->table, (1 << order) * PAGE_SIZE);
return 0;
}
?
Best regards,
baolu