Re: [PATCH] arm64: dts: qcom: ipq9574: enable the SPI NOR support in RDP433

[Kathiravan T]

On 6/14/2023 12:02 PM, Kathiravan T wrote:
> On 6/9/2023 2:37 PM, Konrad Dybcio wrote:
> > On 9.06.2023 10:15, Kathiravan T wrote:
> > > RDP433 has the support for SPI NOR, add the support for it.
> > >
> > > Signed-off-by: Kathiravan T <quic_kathirav@xxxxxxxxxxx>
> > > ---
> > > Note: This patch was part of initial submission
> > > https://lore.kernel.org/linux-arm-msm/20230329053726.14860-1-quic_kathirav@xxxxxxxxxxx/ 
> > >
> > > however this got missed in between, so sending it across again.
> > >
> > >   arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts | 21 
> > > +++++++++++++++++++++
> > >   1 file changed, 21 insertions(+)
> > >
> > > diff --git a/arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts 
> > > b/arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts
> > > index 2b3ed8d351f7..31ee19112157 100644
> > > --- a/arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts
> > > +++ b/arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts
> > > @@ -48,6 +48,20 @@
> > >       };
> > >   };
> > >   +&blsp1_spi0 {
> > > +    pinctrl-0 = <&spi_0_pins>;
> > > +    pinctrl-names = "default";
> > > +    status = "okay";
> > > +
> > > +    flash@0 {
> > > +        compatible = "micron,n25q128a11", "jedec,spi-nor";
> > > +        reg = <0>;
> > > +        #address-cells = <1>;
> > > +        #size-cells = <1>;
> > If you're not adding a partition table, you can drop the address-
> > and size-cells properties, as they determine what the reg value of
> > the child looks like.
>
>
> Sorry, somehow I missed this query. Will check and update it.


Currently IPQ boot loaders patches the partition information into the 
SPI node. To parse that, we need the address-cells and size-cells 
properties.

Also, this patch is now integrated into the below series

https://lore.kernel.org/linux-arm-msm/20230614085040.22071-1-quic_anusha@xxxxxxxxxxx/T/#t


Thanks,


> > Konrad
> > > +        spi-max-frequency = <50000000>;
> > > +    };
> > > +};
> > > +
> > >   &sdhc_1 {
> > >       pinctrl-0 = <&sdc_default_state>;
> > >       pinctrl-names = "default";
> > > @@ -96,6 +110,13 @@
> > >               bias-pull-down;
> > >           };
> > >       };
> > > +
> > > +    spi_0_pins: spi-0-state {
> > > +        pins = "gpio11", "gpio12", "gpio13", "gpio14";
> > > +        function = "blsp0_spi";
> > > +        drive-strength = <8>;
> > > +        bias-disable;
> > > +    };
> > >   };
> > >     &xo_board_clk {