drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c:118:12: warning: stack frame size (2064) exceeds limit (2048) in 'vcn_v3_0_sw_init'

From: kernel test robot
Date: Fri Jun 09 2023 - 11:53:33 EST

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tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: 33f2b5785a2b6b0ed1948aafee60d3abb12f1e3a
commit: 945da79e6dd058be70bc47442dce319844e14daa drm/amdgpu/vcn3: send smu interface type
date: 1 year, 2 months ago
config: riscv-randconfig-r012-20230608 (https://download.01.org/0day-ci/archive/20230609/202306092342.fKgkmOE0-lkp@xxxxxxxxx/config)
compiler: clang version 14.0.6 (https://github.com/llvm/llvm-project.git f28c006a5895fc0e329fe15fead81e37457cb1d1)
reproduce (this is a W=1 build):
mkdir -p ~/bin
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install riscv cross compiling tool for clang build
# apt-get install binutils-riscv64-linux-gnu
# https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=945da79e6dd058be70bc47442dce319844e14daa
git remote add linus https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
git fetch --no-tags linus master
git checkout 945da79e6dd058be70bc47442dce319844e14daa
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang ~/bin/make.cross W=1 O=build_dir ARCH=riscv olddefconfig
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang ~/bin/make.cross W=1 O=build_dir ARCH=riscv SHELL=/bin/bash drivers/gpu/drm/ lib/

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@xxxxxxxxx>
| Closes: https://lore.kernel.org/oe-kbuild-all/202306092342.fKgkmOE0-lkp@xxxxxxxxx/

All warnings (new ones prefixed by >>):

>> drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c:118:12: warning: stack frame size (2064) exceeds limit (2048) in 'vcn_v3_0_sw_init' [-Wframe-larger-than]
static int vcn_v3_0_sw_init(void *handle)
^
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c:1517:12: warning: stack frame size (3600) exceeds limit (2048) in 'vcn_v3_0_stop' [-Wframe-larger-than]
static int vcn_v3_0_stop(struct amdgpu_device *adev)
^
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c:1089:12: warning: stack frame size (7664) exceeds limit (2048) in 'vcn_v3_0_start' [-Wframe-larger-than]
static int vcn_v3_0_start(struct amdgpu_device *adev)
^
3 warnings generated.

vim +/vcn_v3_0_sw_init +118 drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

cf14826cdfb5c9 Leo Liu 2019-11-15 110
cf14826cdfb5c9 Leo Liu 2019-11-15 111 /**
cf14826cdfb5c9 Leo Liu 2019-11-15 112 * vcn_v3_0_sw_init - sw init for VCN block
cf14826cdfb5c9 Leo Liu 2019-11-15 113 *
cf14826cdfb5c9 Leo Liu 2019-11-15 114 * @handle: amdgpu_device pointer
cf14826cdfb5c9 Leo Liu 2019-11-15 115 *
cf14826cdfb5c9 Leo Liu 2019-11-15 116 * Load firmware and sw initialization
cf14826cdfb5c9 Leo Liu 2019-11-15 117 */
cf14826cdfb5c9 Leo Liu 2019-11-15 @118 static int vcn_v3_0_sw_init(void *handle)
cf14826cdfb5c9 Leo Liu 2019-11-15 119 {
cf14826cdfb5c9 Leo Liu 2019-11-15 120 struct amdgpu_ring *ring;
cf14826cdfb5c9 Leo Liu 2019-11-15 121 int i, j, r;
1f61a43fcec1dc Jack Zhang 2020-06-29 122 int vcn_doorbell_index = 0;
cf14826cdfb5c9 Leo Liu 2019-11-15 123 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
cf14826cdfb5c9 Leo Liu 2019-11-15 124
cf14826cdfb5c9 Leo Liu 2019-11-15 125 r = amdgpu_vcn_sw_init(adev);
cf14826cdfb5c9 Leo Liu 2019-11-15 126 if (r)
cf14826cdfb5c9 Leo Liu 2019-11-15 127 return r;
cf14826cdfb5c9 Leo Liu 2019-11-15 128
c5dd5667f4196b Alex Deucher 2021-10-19 129 amdgpu_vcn_setup_ucode(adev);
cf14826cdfb5c9 Leo Liu 2019-11-15 130
cf14826cdfb5c9 Leo Liu 2019-11-15 131 r = amdgpu_vcn_resume(adev);
cf14826cdfb5c9 Leo Liu 2019-11-15 132 if (r)
cf14826cdfb5c9 Leo Liu 2019-11-15 133 return r;
cf14826cdfb5c9 Leo Liu 2019-11-15 134
25a35065c06649 Bokun Zhang 2020-11-09 135 /*
25a35065c06649 Bokun Zhang 2020-11-09 136 * Note: doorbell assignment is fixed for SRIOV multiple VCN engines
25a35065c06649 Bokun Zhang 2020-11-09 137 * Formula:
25a35065c06649 Bokun Zhang 2020-11-09 138 * vcn_db_base = adev->doorbell_index.vcn.vcn_ring0_1 << 1;
25a35065c06649 Bokun Zhang 2020-11-09 139 * dec_ring_i = vcn_db_base + i * (adev->vcn.num_enc_rings + 1)
25a35065c06649 Bokun Zhang 2020-11-09 140 * enc_ring_i,j = vcn_db_base + i * (adev->vcn.num_enc_rings + 1) + 1 + j
25a35065c06649 Bokun Zhang 2020-11-09 141 */
1f61a43fcec1dc Jack Zhang 2020-06-29 142 if (amdgpu_sriov_vf(adev)) {
1f61a43fcec1dc Jack Zhang 2020-06-29 143 vcn_doorbell_index = adev->doorbell_index.vcn.vcn_ring0_1;
1f61a43fcec1dc Jack Zhang 2020-06-29 144 /* get DWORD offset */
1f61a43fcec1dc Jack Zhang 2020-06-29 145 vcn_doorbell_index = vcn_doorbell_index << 1;
1f61a43fcec1dc Jack Zhang 2020-06-29 146 }
1f61a43fcec1dc Jack Zhang 2020-06-29 147
cf14826cdfb5c9 Leo Liu 2019-11-15 148 for (i = 0; i < adev->vcn.num_vcn_inst; i++) {
a76087cf97afe4 James Zhu 2020-11-02 149 volatile struct amdgpu_fw_shared *fw_shared;
c62dfdbbf71095 Christian König 2021-02-02 150
cf14826cdfb5c9 Leo Liu 2019-11-15 151 if (adev->vcn.harvest_config & (1 << i))
cf14826cdfb5c9 Leo Liu 2019-11-15 152 continue;
cf14826cdfb5c9 Leo Liu 2019-11-15 153
cf14826cdfb5c9 Leo Liu 2019-11-15 154 adev->vcn.internal.context_id = mmUVD_CONTEXT_ID_INTERNAL_OFFSET;
cf14826cdfb5c9 Leo Liu 2019-11-15 155 adev->vcn.internal.ib_vmid = mmUVD_LMI_RBC_IB_VMID_INTERNAL_OFFSET;
cf14826cdfb5c9 Leo Liu 2019-11-15 156 adev->vcn.internal.ib_bar_low = mmUVD_LMI_RBC_IB_64BIT_BAR_LOW_INTERNAL_OFFSET;
cf14826cdfb5c9 Leo Liu 2019-11-15 157 adev->vcn.internal.ib_bar_high = mmUVD_LMI_RBC_IB_64BIT_BAR_HIGH_INTERNAL_OFFSET;
cf14826cdfb5c9 Leo Liu 2019-11-15 158 adev->vcn.internal.ib_size = mmUVD_RBC_IB_SIZE_INTERNAL_OFFSET;
cf14826cdfb5c9 Leo Liu 2019-11-15 159 adev->vcn.internal.gp_scratch8 = mmUVD_GP_SCRATCH8_INTERNAL_OFFSET;
cf14826cdfb5c9 Leo Liu 2019-11-15 160
cf14826cdfb5c9 Leo Liu 2019-11-15 161 adev->vcn.internal.scratch9 = mmUVD_SCRATCH9_INTERNAL_OFFSET;
cf14826cdfb5c9 Leo Liu 2019-11-15 162 adev->vcn.inst[i].external.scratch9 = SOC15_REG_OFFSET(VCN, i, mmUVD_SCRATCH9);
cf14826cdfb5c9 Leo Liu 2019-11-15 163 adev->vcn.internal.data0 = mmUVD_GPCOM_VCPU_DATA0_INTERNAL_OFFSET;
cf14826cdfb5c9 Leo Liu 2019-11-15 164 adev->vcn.inst[i].external.data0 = SOC15_REG_OFFSET(VCN, i, mmUVD_GPCOM_VCPU_DATA0);
cf14826cdfb5c9 Leo Liu 2019-11-15 165 adev->vcn.internal.data1 = mmUVD_GPCOM_VCPU_DATA1_INTERNAL_OFFSET;
cf14826cdfb5c9 Leo Liu 2019-11-15 166 adev->vcn.inst[i].external.data1 = SOC15_REG_OFFSET(VCN, i, mmUVD_GPCOM_VCPU_DATA1);
cf14826cdfb5c9 Leo Liu 2019-11-15 167 adev->vcn.internal.cmd = mmUVD_GPCOM_VCPU_CMD_INTERNAL_OFFSET;
cf14826cdfb5c9 Leo Liu 2019-11-15 168 adev->vcn.inst[i].external.cmd = SOC15_REG_OFFSET(VCN, i, mmUVD_GPCOM_VCPU_CMD);
cf14826cdfb5c9 Leo Liu 2019-11-15 169 adev->vcn.internal.nop = mmUVD_NO_OP_INTERNAL_OFFSET;
cf14826cdfb5c9 Leo Liu 2019-11-15 170 adev->vcn.inst[i].external.nop = SOC15_REG_OFFSET(VCN, i, mmUVD_NO_OP);
cf14826cdfb5c9 Leo Liu 2019-11-15 171
cf14826cdfb5c9 Leo Liu 2019-11-15 172 /* VCN DEC TRAP */
cf14826cdfb5c9 Leo Liu 2019-11-15 173 r = amdgpu_irq_add_id(adev, amdgpu_ih_clientid_vcns[i],
cf14826cdfb5c9 Leo Liu 2019-11-15 174 VCN_2_0__SRCID__UVD_SYSTEM_MESSAGE_INTERRUPT, &adev->vcn.inst[i].irq);
cf14826cdfb5c9 Leo Liu 2019-11-15 175 if (r)
cf14826cdfb5c9 Leo Liu 2019-11-15 176 return r;
cf14826cdfb5c9 Leo Liu 2019-11-15 177
c62dfdbbf71095 Christian König 2021-02-02 178 atomic_set(&adev->vcn.inst[i].sched_score, 0);
c62dfdbbf71095 Christian König 2021-02-02 179
cf14826cdfb5c9 Leo Liu 2019-11-15 180 ring = &adev->vcn.inst[i].ring_dec;
cf14826cdfb5c9 Leo Liu 2019-11-15 181 ring->use_doorbell = true;
1f61a43fcec1dc Jack Zhang 2020-06-29 182 if (amdgpu_sriov_vf(adev)) {
25a35065c06649 Bokun Zhang 2020-11-09 183 ring->doorbell_index = vcn_doorbell_index + i * (adev->vcn.num_enc_rings + 1);
1f61a43fcec1dc Jack Zhang 2020-06-29 184 } else {
cf14826cdfb5c9 Leo Liu 2019-11-15 185 ring->doorbell_index = (adev->doorbell_index.vcn.vcn_ring0_1 << 1) + 8 * i;
1f61a43fcec1dc Jack Zhang 2020-06-29 186 }
cf14826cdfb5c9 Leo Liu 2019-11-15 187 sprintf(ring->name, "vcn_dec_%d", i);
cf14826cdfb5c9 Leo Liu 2019-11-15 188 r = amdgpu_ring_init(adev, ring, 512, &adev->vcn.inst[i].irq, 0,
c62dfdbbf71095 Christian König 2021-02-02 189 AMDGPU_RING_PRIO_DEFAULT,
c62dfdbbf71095 Christian König 2021-02-02 190 &adev->vcn.inst[i].sched_score);
cf14826cdfb5c9 Leo Liu 2019-11-15 191 if (r)
cf14826cdfb5c9 Leo Liu 2019-11-15 192 return r;
cf14826cdfb5c9 Leo Liu 2019-11-15 193
cf14826cdfb5c9 Leo Liu 2019-11-15 194 for (j = 0; j < adev->vcn.num_enc_rings; ++j) {
0ad29a4eb13577 Satyajit Sahu 2021-08-27 195 enum amdgpu_ring_priority_level hw_prio = amdgpu_vcn_get_enc_ring_prio(j);
0ad29a4eb13577 Satyajit Sahu 2021-08-27 196
cf14826cdfb5c9 Leo Liu 2019-11-15 197 /* VCN ENC TRAP */
cf14826cdfb5c9 Leo Liu 2019-11-15 198 r = amdgpu_irq_add_id(adev, amdgpu_ih_clientid_vcns[i],
cf14826cdfb5c9 Leo Liu 2019-11-15 199 j + VCN_2_0__SRCID__UVD_ENC_GENERAL_PURPOSE, &adev->vcn.inst[i].irq);
cf14826cdfb5c9 Leo Liu 2019-11-15 200 if (r)
cf14826cdfb5c9 Leo Liu 2019-11-15 201 return r;
cf14826cdfb5c9 Leo Liu 2019-11-15 202
cf14826cdfb5c9 Leo Liu 2019-11-15 203 ring = &adev->vcn.inst[i].ring_enc[j];
cf14826cdfb5c9 Leo Liu 2019-11-15 204 ring->use_doorbell = true;
1f61a43fcec1dc Jack Zhang 2020-06-29 205 if (amdgpu_sriov_vf(adev)) {
25a35065c06649 Bokun Zhang 2020-11-09 206 ring->doorbell_index = vcn_doorbell_index + i * (adev->vcn.num_enc_rings + 1) + 1 + j;
1f61a43fcec1dc Jack Zhang 2020-06-29 207 } else {
cf14826cdfb5c9 Leo Liu 2019-11-15 208 ring->doorbell_index = (adev->doorbell_index.vcn.vcn_ring0_1 << 1) + 2 + j + 8 * i;
1f61a43fcec1dc Jack Zhang 2020-06-29 209 }
cf14826cdfb5c9 Leo Liu 2019-11-15 210 sprintf(ring->name, "vcn_enc_%d.%d", i, j);
cf14826cdfb5c9 Leo Liu 2019-11-15 211 r = amdgpu_ring_init(adev, ring, 512, &adev->vcn.inst[i].irq, 0,
0ad29a4eb13577 Satyajit Sahu 2021-08-27 212 hw_prio, &adev->vcn.inst[i].sched_score);
cf14826cdfb5c9 Leo Liu 2019-11-15 213 if (r)
cf14826cdfb5c9 Leo Liu 2019-11-15 214 return r;
cf14826cdfb5c9 Leo Liu 2019-11-15 215 }
a76087cf97afe4 James Zhu 2020-11-02 216
b6065ebf55ff2f Ruijing Dong 2022-03-02 217 fw_shared = adev->vcn.inst[i].fw_shared.cpu_addr;
e42dd87e70e66a Sonny Jiang 2020-11-27 218 fw_shared->present_flag_0 |= cpu_to_le32(AMDGPU_VCN_SW_RING_FLAG) |
b2576c3bf4ce9b Sonny Jiang 2021-01-31 219 cpu_to_le32(AMDGPU_VCN_MULTI_QUEUE_FLAG) |
b2576c3bf4ce9b Sonny Jiang 2021-01-31 220 cpu_to_le32(AMDGPU_VCN_FW_SHARED_FLAG_0_RB);
a76087cf97afe4 James Zhu 2020-11-02 221 fw_shared->sw_ring.is_enabled = cpu_to_le32(DEC_SW_RING_ENABLED);
945da79e6dd058 Boyuan Zhang 2022-03-24 222 fw_shared->present_flag_0 |= AMDGPU_VCN_SMU_VERSION_INFO_FLAG;
945da79e6dd058 Boyuan Zhang 2022-03-24 223 if (adev->ip_versions[UVD_HWIP][0] == IP_VERSION(3, 1, 2))
945da79e6dd058 Boyuan Zhang 2022-03-24 224 fw_shared->smu_interface_info.smu_interface_type = 2;
945da79e6dd058 Boyuan Zhang 2022-03-24 225 else if (adev->ip_versions[UVD_HWIP][0] == IP_VERSION(3, 1, 1))
945da79e6dd058 Boyuan Zhang 2022-03-24 226 fw_shared->smu_interface_info.smu_interface_type = 1;
11eb648d014eb9 Ruijing Dong 2022-03-02 227
11eb648d014eb9 Ruijing Dong 2022-03-02 228 if (amdgpu_vcnfw_log)
11eb648d014eb9 Ruijing Dong 2022-03-02 229 amdgpu_vcn_fwlog_init(&adev->vcn.inst[i]);
cf14826cdfb5c9 Leo Liu 2019-11-15 230 }
cf14826cdfb5c9 Leo Liu 2019-11-15 231
1f61a43fcec1dc Jack Zhang 2020-06-29 232 if (amdgpu_sriov_vf(adev)) {
1f61a43fcec1dc Jack Zhang 2020-06-29 233 r = amdgpu_virt_alloc_mm_table(adev);
1f61a43fcec1dc Jack Zhang 2020-06-29 234 if (r)
1f61a43fcec1dc Jack Zhang 2020-06-29 235 return r;
1f61a43fcec1dc Jack Zhang 2020-06-29 236 }
cfcc06cd15bf56 Boyuan Zhang 2020-03-27 237 if (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG)
cfcc06cd15bf56 Boyuan Zhang 2020-03-27 238 adev->vcn.pause_dpg_mode = vcn_v3_0_pause_dpg_mode;
cfcc06cd15bf56 Boyuan Zhang 2020-03-27 239
cf14826cdfb5c9 Leo Liu 2019-11-15 240 return 0;
cf14826cdfb5c9 Leo Liu 2019-11-15 241 }
cf14826cdfb5c9 Leo Liu 2019-11-15 242

:::::: The code at line 118 was first introduced by commit
:::::: cf14826cdfb5c9fe10f98210d040b9d7486c381d drm/amdgpu: add VCN3.0 support for Sienna_Cichlid

:::::: TO: Leo Liu <leo.liu@xxxxxxx>
:::::: CC: Alex Deucher <alexander.deucher@xxxxxxx>

--
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