Re: [PATCH v4] PCI: Align pci memory space base address with page size

From: Huacai Chen
Date: Thu Jun 08 2023 - 22:30:13 EST


Hi, Bibo,

On Fri, Jun 9, 2023 at 10:20 AM Bibo Mao <maobibo@xxxxxxxxxxx> wrote:
>
> Some PCI devices have only 4K memory space size, it is normal in general
> machines and aligned with page size. However some architectures which
> support different page size, default page size on LoongArch is 16K, and
> ARM64 supports page size varying from 4K to 64K. On machines where larger
> page size is use, memory space region of two different pci devices may be
> in one page. It is not safe with mmu protection, also VFIO pci device
> driver requires base address of pci memory space page aligned, so that it
> can be memory mapped to qemu user space when it is passed-through to vm.
>
> It consumes more pci memory resource with page size alignment requirement,
> here extra option PCI_MEMRES_PAGE_ALIGN is added, it can be enabled by
> different architectures.
>
> Signed-off-by: Bibo Mao <maobibo@xxxxxxxxxxx>
> ---
> Change history
> v4: add extra kernel option PCI_MEMRES_PAGE_ALIGN to set memory resource
> page aligned.
>
> v3: move alignment requirement to generic pci code
>
> v2: add pci resource alignment requirement in arch specified function
> pcibios_align_resource on arm64/LoongArch platforms
>
> ---
> arch/loongarch/Kconfig | 1 +
> drivers/pci/Kconfig | 3 +++
> drivers/pci/setup-res.c | 7 +++++++
> 3 files changed, 11 insertions(+)
>
> diff --git a/arch/loongarch/Kconfig b/arch/loongarch/Kconfig
> index d38b066fc931..65b2f6ba9f8e 100644
> --- a/arch/loongarch/Kconfig
> +++ b/arch/loongarch/Kconfig
> @@ -142,6 +142,7 @@ config LOONGARCH
> select PCI_LOONGSON
> select PCI_MSI_ARCH_FALLBACKS
> select PCI_QUIRKS
> + select PCI_MEMRES_PAGE_ALIGN
> select PERF_USE_VMALLOC
> select RTC_LIB
> select SMP
> diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
> index 9309f2469b41..9be5f85ff9dc 100644
> --- a/drivers/pci/Kconfig
> +++ b/drivers/pci/Kconfig
> @@ -128,6 +128,9 @@ config PCI_LOCKLESS_CONFIG
> config PCI_BRIDGE_EMUL
> bool
>
> +config PCI_MEMRES_PAGE_ALIGN
> + bool
> +
> config PCI_IOV
> bool "PCI IOV support"
> select PCI_ATS
> diff --git a/drivers/pci/setup-res.c b/drivers/pci/setup-res.c
> index 967f9a758923..6ad76734a670 100644
> --- a/drivers/pci/setup-res.c
> +++ b/drivers/pci/setup-res.c
> @@ -339,6 +339,13 @@ int pci_assign_resource(struct pci_dev *dev, int resno)
> return -EINVAL;
> }
>
> +#ifdef CONFIG_PCI_MEMRES_PAGE_ALIGN
> + /*
> + * force minimum page alignment for vfio pci usage
> + */
> + if (res->flags & IORESOURCE_MEM)
> + align = max_t(resource_size_t, PAGE_SIZE, align);
> +#endif
Does this really have its effect? The common version of
pcibios_align_resource() simply returns res->start, and doesn't care
about the 'align' parameter.

Huacai
> size = resource_size(res);
> ret = _pci_assign_resource(dev, resno, size, align);
>
> --
> 2.27.0
>