[PATCH] ASoC: tegra: Simplify code around clk_get_rate() handling

From: Christophe JAILLET
Date: Thu Jun 08 2023 - 01:27:39 EST


clk_get_rate() returns an unsigned long, so there is no point in storing it
in a long, and test for negative values.

So, turn 'parent_rate' into an unsigned long, simplify the sanity check,
the error message and the return value, in case of error (i.e. 0).

Doing so also turns 'i' and 'valid_rates' into unsigned long, but it is
fine and harmless.

Signed-off-by: Christophe JAILLET <christophe.jaillet@xxxxxxxxxx>
---
sound/soc/tegra/tegra20_i2s.c | 9 ++++-----
sound/soc/tegra/tegra20_spdif.c | 9 ++++-----
2 files changed, 8 insertions(+), 10 deletions(-)

diff --git a/sound/soc/tegra/tegra20_i2s.c b/sound/soc/tegra/tegra20_i2s.c
index e1a0f50969c1..d38b58305c6b 100644
--- a/sound/soc/tegra/tegra20_i2s.c
+++ b/sound/soc/tegra/tegra20_i2s.c
@@ -273,13 +273,12 @@ static int tegra20_i2s_filter_rates(struct snd_pcm_hw_params *params,
struct snd_soc_dai *dai = rule->private;
struct tegra20_i2s *i2s = dev_get_drvdata(dai->dev);
struct clk *parent = clk_get_parent(i2s->clk_i2s);
- long i, parent_rate, valid_rates = 0;
+ unsigned long i, parent_rate, valid_rates = 0;

parent_rate = clk_get_rate(parent);
- if (parent_rate <= 0) {
- dev_err(dai->dev, "Can't get parent clock rate: %ld\n",
- parent_rate);
- return parent_rate ?: -EINVAL;
+ if (!parent_rate) {
+ dev_err(dai->dev, "Can't get parent clock rate\n");
+ return -EINVAL;
}

for (i = 0; i < ARRAY_SIZE(tegra20_i2s_rates); i++) {
diff --git a/sound/soc/tegra/tegra20_spdif.c b/sound/soc/tegra/tegra20_spdif.c
index 86bef54dfdf2..d034803695a0 100644
--- a/sound/soc/tegra/tegra20_spdif.c
+++ b/sound/soc/tegra/tegra20_spdif.c
@@ -187,13 +187,12 @@ static int tegra20_spdif_filter_rates(struct snd_pcm_hw_params *params,
struct tegra20_spdif *spdif = dev_get_drvdata(dai->dev);
struct clk *parent = clk_get_parent(spdif->clk_spdif_out);
static const unsigned int rates[] = { 32000, 44100, 48000 };
- long i, parent_rate, valid_rates = 0;
+ unsigned long i, parent_rate, valid_rates = 0;

parent_rate = clk_get_rate(parent);
- if (parent_rate <= 0) {
- dev_err(dai->dev, "Can't get parent clock rate: %ld\n",
- parent_rate);
- return parent_rate ?: -EINVAL;
+ if (!parent_rate) {
+ dev_err(dai->dev, "Can't get parent clock rate\n");
+ return -EINVAL;
}

for (i = 0; i < ARRAY_SIZE(rates); i++) {
--
2.34.1