[PATCH 01/12] mtd: rawnand: brcmnand: Fix ECC level field setting for v7.2 controller

From: William Zhang
Date: Tue Jun 06 2023 - 19:14:04 EST


v7.2 controller has different ECC level field size and shift in the acc
control register than its predecessor and successor controller. It needs
to be set specifically.

Fixes: decba6d47869 ("mtd: brcmnand: Add v7.2 controller support")
Signed-off-by: William Zhang <william.zhang@xxxxxxxxxxxx>
Reviewed-by: Florian Fainelli <florian.fainelli@xxxxxxxxxxxx>
---

drivers/mtd/nand/raw/brcmnand/brcmnand.c | 14 +++++++++++---
1 file changed, 11 insertions(+), 3 deletions(-)

diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
index 2e9c2e2d9c9f..b2cde1082b3b 100644
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
@@ -977,12 +977,20 @@ static inline u32 brcmnand_ecc_level_mask(struct brcmnand_controller *ctrl)
mask <<= NAND_ACC_CONTROL_ECC_SHIFT;

/* v7.2 includes additional ECC levels */
- if (ctrl->nand_version >= 0x0702)
+ if (ctrl->nand_version == 0x0702)
mask |= 0x7 << NAND_ACC_CONTROL_ECC_EXT_SHIFT;

return mask;
}

+static inline int brcmnand_ecc_level_shift(struct brcmnand_controller *ctrl)
+{
+ if (ctrl->nand_version == 0x0702)
+ return NAND_ACC_CONTROL_ECC_EXT_SHIFT;
+ else
+ return NAND_ACC_CONTROL_ECC_SHIFT;
+}
+
static void brcmnand_set_ecc_enabled(struct brcmnand_host *host, int en)
{
struct brcmnand_controller *ctrl = host->ctrl;
@@ -992,8 +1000,8 @@ static void brcmnand_set_ecc_enabled(struct brcmnand_host *host, int en)

if (en) {
acc_control |= ecc_flags; /* enable RD/WR ECC */
- acc_control |= host->hwcfg.ecc_level
- << NAND_ACC_CONTROL_ECC_SHIFT;
+ acc_control &= ~brcmnand_ecc_level_mask(ctrl);
+ acc_control |= host->hwcfg.ecc_level << brcmnand_ecc_level_shift(ctrl);
} else {
acc_control &= ~ecc_flags; /* disable RD/WR ECC */
acc_control &= ~brcmnand_ecc_level_mask(ctrl);
--
2.37.3

Attachment: smime.p7s
Description: S/MIME Cryptographic Signature