Re: [PATCH v2 3/6] arm64: dts: qcom: sm8250: Use 2 interconnect cells

From: Konrad Dybcio
Date: Fri Jun 02 2023 - 05:23:02 EST

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In reply to: Abel Vesa: "[PATCH v2 3/6] arm64: dts: qcom: sm8250: Use 2 interconnect cells"
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On 2.06.2023 08:20, Abel Vesa wrote:
> Use two interconnect cells in order to optionally support a path tag.
>
> Signed-off-by: Abel Vesa <abel.vesa@xxxxxxxxxx>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>

Konrad
>
> Changes since v1:
> * This patch was not part of v1
>
> arch/arm64/boot/dts/qcom/sm8250.dtsi | 72 ++++++++++++++--------------
> 1 file changed, 36 insertions(+), 36 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> index e5c60a6e4074..c5787489b05c 100644
> --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> @@ -106,8 +106,8 @@ CPU0: cpu@0 {
> power-domain-names = "psci";
> qcom,freq-domain = <&cpufreq_hw 0>;
> operating-points-v2 = <&cpu0_opp_table>;
> - interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
> - <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>;
> + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
> + <&epss_l3 MASTER_OSM_L3_APPS 0 &epss_l3 SLAVE_OSM_L3 0>;
> #cooling-cells = <2>;
> L2_0: l2-cache {
> compatible = "cache";
> @@ -137,8 +137,8 @@ CPU1: cpu@100 {
> power-domain-names = "psci";
> qcom,freq-domain = <&cpufreq_hw 0>;
> operating-points-v2 = <&cpu0_opp_table>;
> - interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
> - <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>;
> + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
> + <&epss_l3 MASTER_OSM_L3_APPS 0 &epss_l3 SLAVE_OSM_L3 0>;
> #cooling-cells = <2>;
> L2_100: l2-cache {
> compatible = "cache";
> @@ -162,8 +162,8 @@ CPU2: cpu@200 {
> power-domain-names = "psci";
> qcom,freq-domain = <&cpufreq_hw 0>;
> operating-points-v2 = <&cpu0_opp_table>;
> - interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
> - <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>;
> + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
> + <&epss_l3 MASTER_OSM_L3_APPS 0 &epss_l3 SLAVE_OSM_L3 0>;
> #cooling-cells = <2>;
> L2_200: l2-cache {
> compatible = "cache";
> @@ -187,8 +187,8 @@ CPU3: cpu@300 {
> power-domain-names = "psci";
> qcom,freq-domain = <&cpufreq_hw 0>;
> operating-points-v2 = <&cpu0_opp_table>;
> - interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
> - <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>;
> + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
> + <&epss_l3 MASTER_OSM_L3_APPS 0 &epss_l3 SLAVE_OSM_L3 0>;
> #cooling-cells = <2>;
> L2_300: l2-cache {
> compatible = "cache";
> @@ -212,8 +212,8 @@ CPU4: cpu@400 {
> power-domain-names = "psci";
> qcom,freq-domain = <&cpufreq_hw 1>;
> operating-points-v2 = <&cpu4_opp_table>;
> - interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
> - <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>;
> + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
> + <&epss_l3 MASTER_OSM_L3_APPS 0 &epss_l3 SLAVE_OSM_L3 0>;
> #cooling-cells = <2>;
> L2_400: l2-cache {
> compatible = "cache";
> @@ -237,8 +237,8 @@ CPU5: cpu@500 {
> power-domain-names = "psci";
> qcom,freq-domain = <&cpufreq_hw 1>;
> operating-points-v2 = <&cpu4_opp_table>;
> - interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
> - <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>;
> + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
> + <&epss_l3 MASTER_OSM_L3_APPS 0 &epss_l3 SLAVE_OSM_L3 0>;
> #cooling-cells = <2>;
> L2_500: l2-cache {
> compatible = "cache";
> @@ -262,8 +262,8 @@ CPU6: cpu@600 {
> power-domain-names = "psci";
> qcom,freq-domain = <&cpufreq_hw 1>;
> operating-points-v2 = <&cpu4_opp_table>;
> - interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
> - <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>;
> + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
> + <&epss_l3 MASTER_OSM_L3_APPS 0 &epss_l3 SLAVE_OSM_L3 0>;
> #cooling-cells = <2>;
> L2_600: l2-cache {
> compatible = "cache";
> @@ -287,8 +287,8 @@ CPU7: cpu@700 {
> power-domain-names = "psci";
> qcom,freq-domain = <&cpufreq_hw 2>;
> operating-points-v2 = <&cpu7_opp_table>;
> - interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
> - <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>;
> + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
> + <&epss_l3 MASTER_OSM_L3_APPS 0 &epss_l3 SLAVE_OSM_L3 0>;
> #cooling-cells = <2>;
> L2_700: l2-cache {
> compatible = "cache";
> @@ -1789,49 +1789,49 @@ spi13: spi@a94000 {
> config_noc: interconnect@1500000 {
> compatible = "qcom,sm8250-config-noc";
> reg = <0 0x01500000 0 0xa580>;
> - #interconnect-cells = <1>;
> + #interconnect-cells = <2>;
> qcom,bcm-voters = <&apps_bcm_voter>;
> };
>
> system_noc: interconnect@1620000 {
> compatible = "qcom,sm8250-system-noc";
> reg = <0 0x01620000 0 0x1c200>;
> - #interconnect-cells = <1>;
> + #interconnect-cells = <2>;
> qcom,bcm-voters = <&apps_bcm_voter>;
> };
>
> mc_virt: interconnect@163d000 {
> compatible = "qcom,sm8250-mc-virt";
> reg = <0 0x0163d000 0 0x1000>;
> - #interconnect-cells = <1>;
> + #interconnect-cells = <2>;
> qcom,bcm-voters = <&apps_bcm_voter>;
> };
>
> aggre1_noc: interconnect@16e0000 {
> compatible = "qcom,sm8250-aggre1-noc";
> reg = <0 0x016e0000 0 0x1f180>;
> - #interconnect-cells = <1>;
> + #interconnect-cells = <2>;
> qcom,bcm-voters = <&apps_bcm_voter>;
> };
>
> aggre2_noc: interconnect@1700000 {
> compatible = "qcom,sm8250-aggre2-noc";
> reg = <0 0x01700000 0 0x33000>;
> - #interconnect-cells = <1>;
> + #interconnect-cells = <2>;
> qcom,bcm-voters = <&apps_bcm_voter>;
> };
>
> compute_noc: interconnect@1733000 {
> compatible = "qcom,sm8250-compute-noc";
> reg = <0 0x01733000 0 0xa180>;
> - #interconnect-cells = <1>;
> + #interconnect-cells = <2>;
> qcom,bcm-voters = <&apps_bcm_voter>;
> };
>
> mmss_noc: interconnect@1740000 {
> compatible = "qcom,sm8250-mmss-noc";
> reg = <0 0x01740000 0 0x1f080>;
> - #interconnect-cells = <1>;
> + #interconnect-cells = <2>;
> qcom,bcm-voters = <&apps_bcm_voter>;
> };
>
> @@ -2260,7 +2260,7 @@ crypto: crypto@1dfa000 {
> <&apps_smmu 0x59f 0x0000>,
> <&apps_smmu 0x586 0x0011>,
> <&apps_smmu 0x596 0x0011>;
> - interconnects = <&aggre2_noc MASTER_CRYPTO_CORE_0 &mc_virt SLAVE_EBI_CH0>;
> + interconnects = <&aggre2_noc MASTER_CRYPTO_CORE_0 0 &mc_virt SLAVE_EBI_CH0 0>;
> interconnect-names = "memory";
> };
>
> @@ -3693,21 +3693,21 @@ opp-202000000 {
> dc_noc: interconnect@90c0000 {
> compatible = "qcom,sm8250-dc-noc";
> reg = <0 0x090c0000 0 0x4200>;
> - #interconnect-cells = <1>;
> + #interconnect-cells = <2>;
> qcom,bcm-voters = <&apps_bcm_voter>;
> };
>
> gem_noc: interconnect@9100000 {
> compatible = "qcom,sm8250-gem-noc";
> reg = <0 0x09100000 0 0xb4000>;
> - #interconnect-cells = <1>;
> + #interconnect-cells = <2>;
> qcom,bcm-voters = <&apps_bcm_voter>;
> };
>
> npu_noc: interconnect@9990000 {
> compatible = "qcom,sm8250-npu-noc";
> reg = <0 0x09990000 0 0x1600>;
> - #interconnect-cells = <1>;
> + #interconnect-cells = <2>;
> qcom,bcm-voters = <&apps_bcm_voter>;
> };
>
> @@ -3837,8 +3837,8 @@ venus: video-codec@aa00000 {
> <&videocc VIDEO_CC_MVS0_CLK>;
> clock-names = "iface", "core", "vcodec0_core";
>
> - interconnects = <&gem_noc MASTER_AMPSS_M0 &config_noc SLAVE_VENUS_CFG>,
> - <&mmss_noc MASTER_VIDEO_P0 &mc_virt SLAVE_EBI_CH0>;
> + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_VENUS_CFG 0>,
> + <&mmss_noc MASTER_VIDEO_P0 0 &mc_virt SLAVE_EBI_CH0 0>;
> interconnect-names = "cpu-cfg", "video-mem";
>
> iommus = <&apps_smmu 0x2100 0x0400>;
> @@ -4122,10 +4122,10 @@ camss: camss@ac6a000 {
> <&apps_smmu 0xc40 0x400>,
> <&apps_smmu 0xc41 0x400>;
>
> - interconnects = <&gem_noc MASTER_AMPSS_M0 &config_noc SLAVE_CAMERA_CFG>,
> - <&mmss_noc MASTER_CAMNOC_HF &mc_virt SLAVE_EBI_CH0>,
> - <&mmss_noc MASTER_CAMNOC_SF &mc_virt SLAVE_EBI_CH0>,
> - <&mmss_noc MASTER_CAMNOC_ICP &mc_virt SLAVE_EBI_CH0>;
> + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_CAMERA_CFG 0>,
> + <&mmss_noc MASTER_CAMNOC_HF 0 &mc_virt SLAVE_EBI_CH0 0>,
> + <&mmss_noc MASTER_CAMNOC_SF 0 &mc_virt SLAVE_EBI_CH0 0>,
> + <&mmss_noc MASTER_CAMNOC_ICP 0 &mc_virt SLAVE_EBI_CH0 0>;
> interconnect-names = "cam_ahb",
> "cam_hf_0_mnoc",
> "cam_sf_0_mnoc",
> @@ -4182,8 +4182,8 @@ mdss: display-subsystem@ae00000 {
> reg = <0 0x0ae00000 0 0x1000>;
> reg-names = "mdss";
>
> - interconnects = <&mmss_noc MASTER_MDP_PORT0 &mc_virt SLAVE_EBI_CH0>,
> - <&mmss_noc MASTER_MDP_PORT1 &mc_virt SLAVE_EBI_CH0>;
> + interconnects = <&mmss_noc MASTER_MDP_PORT0 0 &mc_virt SLAVE_EBI_CH0 0>,
> + <&mmss_noc MASTER_MDP_PORT1 0 &mc_virt SLAVE_EBI_CH0 0>;
> interconnect-names = "mdp0-mem", "mdp1-mem";
>
> power-domains = <&dispcc MDSS_GDSC>;
> @@ -5671,7 +5671,7 @@ epss_l3: interconnect@18590000 {
> clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
> clock-names = "xo", "alternate";
>
> - #interconnect-cells = <1>;
> + #interconnect-cells = <2>;
> };
>
> cpufreq_hw: cpufreq@18591000 {

Next message: Konrad Dybcio: "Re: [PATCH v2 4/6] arm64: dts: qcom: sm8250: Add missing interconnect paths to USB HCs"
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In reply to: Abel Vesa: "[PATCH v2 3/6] arm64: dts: qcom: sm8250: Use 2 interconnect cells"
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