Re: [PATCH 0/7] riscv: Memory Hot(Un)Plug support

From: Björn Töpel
Date: Wed May 17 2023 - 14:54:02 EST


David Hildenbrand <david@xxxxxxxxxx> writes:

> On 12.05.23 16:57, Björn Töpel wrote:
>> From: Björn Töpel <bjorn@xxxxxxxxxxxx>
>>
>> Memory Hot(Un)Plug support for the RISC-V port
>> ==============================================

[...]

>
> Cool stuff! I'm fairly busy right now, so some high-level questions upfront:

No worries, and no rush! I'd say the v1 series was mainly for the RISC-V
folks, and I've got tons of (offline) comments from Alex -- and with
your comments below some more details to figure out.

> What is the memory section size (which implies the memory block size
> and)? This implies the minimum DIMM granularity and the high-level
> granularity in which virtio-mem adds memory.

It's 128M (27 bits) -- (like arm64 and x86-64?).

> What is the pageblock size, implying the minimum granularity that
> virtio-mem can operate on?

Nothing special AFAIU; MAX_ORDER is 10, so PAGE_SIZE (4K) * 1024. Hmm, I
realize that I need to look into some more details of virtio-mem! :-)

> On x86-64 and arm64 we currently use the ACPI SRAT to expose the maximum
> physical address where we can see memory getting hotplugged. [1] From
> that, we can derive the "max_possible_pfn" and prepare the kernel
> virtual memory layourt (especially, direct map).
>
> Is something similar required on RISC-V?

Yes! RISC-V is in the progress of getting proper ACPI support. Thanks
for pointing me in the these directions; Food for thought that I'll
digest for the next version.


Cheers,
Björn