Re: [PATCH V8 1/4] dt-bindings: clock: document Amlogic S4 SoC PLL clock controller

[Krzysztof Kozlowski]

On 15/05/2023 09:57, Yu Tu wrote:
> 
> 
> On 2023/5/15 15:35, Yu Tu wrote:
>> Hi Krzysztof,
>>      Thank you for your prompt reply.
>>
>> On 2023/5/15 14:32, Krzysztof Kozlowski wrote:
>>> On 15/05/2023 05:15, Yu Tu wrote:
>>>> Add the S4 PLL clock controller dt-bindings in the s4 SoC family.
>>>>
>>>> Signed-off-by: Yu Tu <yu.tu@xxxxxxxxxxx>
>>>
>>> This is a friendly reminder during the review process.
>>>
>>> It looks like you received a tag and forgot to add it.
>>>
>>> If you do not know the process, here is a short explanation:
>>> Please add Acked-by/Reviewed-by/Tested-by tags when posting new
>>> versions. However, there's no need to repost patches *only* to add the
>>> tags. The upstream maintainer will do that for acks received on the
>>> version they apply.
>>>
>>> https://elixir.bootlin.com/linux/v5.17/source/Documentation/process/submitting-patches.rst#L540
>>>
>>> If a tag was not added on purpose, please state why and what changed.
>>
>> Yes. I don't know the process. So I need to add Reviewed-by: Rob Herring 
>> <robh@xxxxxxxxxx>. And resend V8?
>>
> 
> I would like to ask you again by the way. I'm not sure if I can just add 
> the TAG. Because I actually changed the V8.

Your changelog in cover letter does not describe it. It only mentions
vaguely "change patch series". Describe exactly what changed.

Best regards,
Krzysztof