Re: [PATCH V3 2/3] clk: qcom: videocc-sm8450: Add video clock controller driver for SM8450

[Taniya Das]

Thanks for your review.

On 5/4/2023 1:14 PM, Konrad Dybcio wrote:
> On 3.05.2023 12:59, Taniya Das wrote:
> > Add support for the video clock controller driver for peripheral clock
> > clients to be able to request for video cc clocks.
> >
> > Signed-off-by: Taniya Das <quic_tdas@xxxxxxxxxxx>
> > ---
> > Changes since V2:
> >   - Update the header file name to match the latest upstream header
> >     files.
> >
> > Changes since V1:
> >   - Use DT indices instead of fw_name.
> >   - Replace pm_runtime_enable with devm_pm_runtime_enable.
> >   - Change license to GPL from GPL V2.
> >
> >   drivers/clk/qcom/Kconfig          |   9 +
> >   drivers/clk/qcom/Makefile         |   1 +
> >   drivers/clk/qcom/videocc-sm8450.c | 459 ++++++++++++++++++++++++++++++
> >   3 files changed, 469 insertions(+)
> >   create mode 100644 drivers/clk/qcom/videocc-sm8450.c
> >
> > diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig
> > index 12be3e2371b3..927aa5983464 100644
> > --- a/drivers/clk/qcom/Kconfig
> > +++ b/drivers/clk/qcom/Kconfig
> > @@ -962,4 +962,13 @@ config CLK_GFM_LPASS_SM8250
> >   	  Support for the Glitch Free Mux (GFM) Low power audio
> >             subsystem (LPASS) clocks found on SM8250 SoCs.
> >   
> > +config SM_VIDEOCC_8450
> > +	tristate "SM8450 Video Clock Controller"
> > +	select SM_GCC_8450
> > +	select QCOM_GDSC
> > +	help
> > +	  Support for the video clock controller on Qualcomm Technologies, Inc.
> > +	  SM8450 devices.
> > +	  Say Y if you want to support video devices and functionality such as
> > +	  video encode/decode.
> >   endif
> > diff --git a/drivers/clk/qcom/Makefile b/drivers/clk/qcom/Makefile
> > index 9ff4c373ad95..1960ad8e8713 100644
> > --- a/drivers/clk/qcom/Makefile
> > +++ b/drivers/clk/qcom/Makefile
> > @@ -127,6 +127,7 @@ obj-$(CONFIG_SM_GPUCC_8350) += gpucc-sm8350.o
> >   obj-$(CONFIG_SM_TCSRCC_8550) += tcsrcc-sm8550.o
> >   obj-$(CONFIG_SM_VIDEOCC_8150) += videocc-sm8150.o
> >   obj-$(CONFIG_SM_VIDEOCC_8250) += videocc-sm8250.o
> > +obj-$(CONFIG_SM_VIDEOCC_8450) += videocc-sm8450.o
> >   obj-$(CONFIG_SPMI_PMIC_CLKDIV) += clk-spmi-pmic-div.o
> >   obj-$(CONFIG_KPSS_XCC) += kpss-xcc.o
> >   obj-$(CONFIG_QCOM_HFPLL) += hfpll.o
> > diff --git a/drivers/clk/qcom/videocc-sm8450.c b/drivers/clk/qcom/videocc-sm8450.c
> > new file mode 100644
> > index 000000000000..ce0ab764eb35
> > --- /dev/null
> > +++ b/drivers/clk/qcom/videocc-sm8450.c
> > @@ -0,0 +1,459 @@
> > +// SPDX-License-Identifier: GPL-2.0-only
> > +/*
> > + * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved.
> > + */
> > +
> > +#include <linux/clk-provider.h>
> > +#include <linux/module.h>
> > +#include <linux/of_device.h>
> > +#include <linux/pm_runtime.h>
> > +#include <linux/regmap.h>
> > +
> > +#include <dt-bindings/clock/qcom,sm8450-videocc.h>
> > +
> > +#include "clk-alpha-pll.h"
> > +#include "clk-branch.h"
> > +#include "clk-rcg.h"
> > +#include "clk-regmap.h"
> > +#include "clk-regmap-divider.h"
> > +#include "common.h"
> > +#include "gdsc.h"
> > +#include "reset.h"
> > +
> > +enum {
> > +	DT_BI_TCXO,
> > +};
> > +
> > +enum {
> > +	P_BI_TCXO,
> > +	P_VIDEO_CC_PLL0_OUT_MAIN,
> > +	P_VIDEO_CC_PLL1_OUT_MAIN,
> > +};
> > +
> > +static const struct pll_vco lucid_evo_vco[] = {
> > +	{ 249600000, 2020000000, 0 },
> > +};
> > +
> > +static const struct alpha_pll_config video_cc_pll0_config = {
> > +	.l = 0x1E,
> lowercase hex, please, everywhere

Sure, will take care.

> > +	.alpha = 0x0,
> > +	.config_ctl_val = 0x20485699,
> > +	.config_ctl_hi_val = 0x00182261,
> > +	.config_ctl_hi1_val = 0x32AA299C,
> > +	.user_ctl_val = 0x00000000,
> > +	.user_ctl_hi_val = 0x00000805,
> > +};
> [...]
>
> > +static int video_cc_sm8450_probe(struct platform_device *pdev)
> > +{
> > +	struct regmap *regmap;
> > +	int ret;
> > +
> > +	devm_pm_runtime_enable(&pdev->dev);
> Please check the return value here and bail out early on failure.

Will take care in the next patchset.

> > +
> > +	ret = pm_runtime_resume_and_get(&pdev->dev);
> > +	if (ret)
> > +		return ret;
> > +
> > +	regmap = qcom_cc_map(pdev, &video_cc_sm8450_desc);
> > +	if (IS_ERR(regmap)) {
> > +		pm_runtime_put(&pdev->dev);
> > +		return PTR_ERR(regmap);
> > +	}
> > +
> > +	clk_lucid_evo_pll_configure(&video_cc_pll0, regmap, &video_cc_pll0_config);
> > +	clk_lucid_evo_pll_configure(&video_cc_pll1, regmap, &video_cc_pll1_config);
> > +
> > +	/*
> > +	 * Keep clocks always enabled:
> > +	 *	video_cc_ahb_clk
> > +	 *	video_cc_sleep_clk
> > +	 *	video_cc_xo_clk
> > +	 */
> > +	regmap_update_bits(regmap, 0x80e4, BIT(0), BIT(0));
> > +	regmap_update_bits(regmap, 0x8130, BIT(0), BIT(0));
> > +	regmap_update_bits(regmap, 0x8114, BIT(0), BIT(0));
> > +
> > +	ret = qcom_cc_really_probe(pdev, &video_cc_sm8450_desc, regmap);
> > +
> > +	pm_runtime_put(&pdev->dev);
> > +
> > +	return ret;
> > +}
> > +
> > +static struct platform_driver video_cc_sm8450_driver = {
> > +	.probe = video_cc_sm8450_probe,
> > +	.driver = {
> > +		.name = "video_cc-sm8450",
> > +		.of_match_table = video_cc_sm8450_match_table,
> > +	},
> > +};
> > +
> > +static int __init video_cc_sm8450_init(void)
> > +{
> > +	return platform_driver_register(&video_cc_sm8450_driver);
> > +}
> > +subsys_initcall(video_cc_sm8450_init);
> module_platform_driver?
>
> Venus won't probe earlier

Clock drivers should be earlier than any consumer drivers.

> Konrad
> > +
> > +static void __exit video_cc_sm8450_exit(void)
> > +{
> > +	platform_driver_unregister(&video_cc_sm8450_driver);
> > +}
> > +module_exit(video_cc_sm8450_exit);
> > +
> > +MODULE_DESCRIPTION("QTI VIDEO_CC SM8450 Driver");
> > +MODULE_LICENSE("GPL");

--
Thanks & Regards,
Taniya Das.