[PATCH 1/5] irqchip/sifive-plic: Support T-HEAD's C910 PLIC

[Jisheng Zhang]

The T-HEAD's C910 PLIC still needs the delegation bit settingto allow
access from S-mode, but it doesn't need the edge quirk.

Signed-off-by: Jisheng Zhang <jszhang@xxxxxxxxxx>
---
 .../bindings/interrupt-controller/sifive,plic-1.0.0.yaml      | 4 ++++
 drivers/irqchip/irq-sifive-plic.c                             | 1 +
 2 files changed, 5 insertions(+)

diff --git a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
index f75736a061af..64b43a3c3748 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
@@ -62,6 +62,10 @@ properties:
               - starfive,jh7110-plic
               - canaan,k210-plic
           - const: sifive,plic-1.0.0
+      - items:
+          - enum:
+              - thead,light-plic
+          - const: thead,c910-plic
       - items:
           - enum:
               - allwinner,sun20i-d1-plic
diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c
index e1484905b7bd..71afa2a584d9 100644
--- a/drivers/irqchip/irq-sifive-plic.c
+++ b/drivers/irqchip/irq-sifive-plic.c
@@ -569,6 +569,7 @@ static int __init plic_init(struct device_node *node,
 }
 
 IRQCHIP_DECLARE(sifive_plic, "sifive,plic-1.0.0", plic_init);
+IRQCHIP_DECLARE(thead_c910_plic, "thead,c910-plic", plic_init);
 IRQCHIP_DECLARE(riscv_plic0, "riscv,plic0", plic_init); /* for legacy systems */
 
 static int __init plic_edge_init(struct device_node *node,
-- 
2.40.0