Re: [PATCH 1/6] arm64: dts: qcom: sm8350: add ports subnodes in usb1 qmpphy node

From: Neil Armstrong
Date: Thu May 04 2023 - 11:39:35 EST


On 04/05/2023 14:57, Neil Armstrong wrote:
On 04/05/2023 09:38, Konrad Dybcio wrote:


On 3.05.2023 15:10, Neil Armstrong wrote:
Add the USB3+DP Combo QMP PHY port subnodes in the SM8350 SoC DTSI
to avoid duplication in the devices DTs.

Signed-off-by: Neil Armstrong <neil.armstrong@xxxxxxxxxx>
---
  arch/arm64/boot/dts/qcom/sm8350.dtsi | 26 ++++++++++++++++++++++++++
  1 file changed, 26 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index ebcb481571c2..d048f4d35c89 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -2149,6 +2149,32 @@ usb_1_qmpphy: phy@88e9000 {
              #phy-cells = <1>;
              status = "disabled";
+
+            ports {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                port@0 {
+                    reg = <0>;
+
+                    usb_1_qmpphy_out: endpoint {
+                    };
+                };
+
+                port@1 {
+                    #address-cells = <1>;
+                    #size-cells = <0>;
+                    reg = <1>;
+
+                    usb_1_qmpphy_usb_ss_in: endpoint@0 {
+                        reg = <0>;
+                    };
+
+                    usb_1_qmpphy_dp_in: endpoint@1 {
+                        reg = <1>;
+                    };
Shouldn't dp be a separate port@2?

Probably yes, but it should be the same issue for makena, but on makena
we do not describe the USB SS and HS links separately, but only a single
port for QMP input has been defined in the bindings.

Forget my comment, there's the 2 ports in the bindings, I was confused
after the bindings reviews...

Neil


Neil


Konrad
+                };
+            };
          };
          usb_2_qmpphy: phy-wrapper@88eb000 {