Re: [PATCH 1/2] clk: renesas: r8a779a0: Add PWM clock

[Kieran Bingham]

Quoting Geert Uytterhoeven (2023-05-03 11:09:29)
> Hi Wolfram,
> 
> On Tue, May 2, 2023 at 7:06 PM Wolfram Sang
> <wsa+renesas@xxxxxxxxxxxxxxxxxxxx> wrote:
> > Tested-by: Kieran Bingham <kieran.bingham+renesas@xxxxxxxxxxxxxxxx>
> > Signed-off-by: Wolfram Sang <wsa+renesas@xxxxxxxxxxxxxxxxxxxx>
> 
> Thanks for your patch!
> 
> > --- a/drivers/clk/renesas/r8a779a0-cpg-mssr.c
> > +++ b/drivers/clk/renesas/r8a779a0-cpg-mssr.c
> > @@ -170,6 +170,7 @@ static const struct mssr_mod_clk r8a779a0_mod_clks[] __initconst = {
> >         DEF_MOD("msi3",         621,    R8A779A0_CLK_MSO),
> >         DEF_MOD("msi4",         622,    R8A779A0_CLK_MSO),
> >         DEF_MOD("msi5",         623,    R8A779A0_CLK_MSO),
> > +       DEF_MOD("pwm",          628,    R8A779A0_CLK_S1D8),
> 
> Do you mind if I rename this to "pwm0" while applying, to match the docs?
> 
> Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
> i.e. will queue in renesas-clk-for-v6.5.

Either way is fine with me, and I've seen this work now so:

Reviewed-by: Kieran Bingham <kieran.bingham+renesas@xxxxxxxxxxxxxxxx>

> 
> >         DEF_MOD("rpc-if",       629,    R8A779A0_CLK_RPCD2),
> >         DEF_MOD("scif0",        702,    R8A779A0_CLK_S1D8),
> >         DEF_MOD("scif1",        703,    R8A779A0_CLK_S1D8),
> 
> Gr{oetje,eeting}s,
> 
>                         Geert
> 
> -- 
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
> 
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
>                                 -- Linus Torvalds