Em Thu, Apr 20, 2023 at 10:52:53PM -0700, Ganapatrao Kulkarni escreveu:
The current implementation supports coresight trace decode for a range
of CPUs, if the first CPU is CPU0.
Perf report segfaults, if tried for sparse CPUs list and also for
any range of CPUs(non zero first CPU).
Adding a fix to perf report for any range of CPUs and for sparse list.
Can some ARM people please review this?
- Arnaldo