[PATCH v4 2/4] arm64: dts: qcom: Make -cells decimal

From: Andrew Halaney
Date: Mon May 01 2023 - 17:26:24 EST


The property logically makes sense in decimal, and is the standard used
elsewhere.

Suggested-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
Signed-off-by: Andrew Halaney <ahalaney@xxxxxxxxxx>
---

Changes since v3:
* Treat all of arm64/qcom at once (Krzysztof)
* Dropped Konrad's RB tag since the scope expanded
Changes since v2:
* Collect tags
Changes since v1:
* New patch (Konrad)

arch/arm64/boot/dts/qcom/ipq6018.dtsi | 2 +-
arch/arm64/boot/dts/qcom/ipq8074.dtsi | 14 +++++++-------
arch/arm64/boot/dts/qcom/msm8953.dtsi | 4 ++--
arch/arm64/boot/dts/qcom/qcs404-evb-4000.dts | 4 ++--
arch/arm64/boot/dts/qcom/sa8155p-adp.dts | 4 ++--
5 files changed, 14 insertions(+), 14 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
index 9ff4e9d45065..ccaf8e57668a 100644
--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
@@ -571,7 +571,7 @@ intc: interrupt-controller@b000000 {
#address-cells = <2>;
#size-cells = <2>;
interrupt-controller;
- #interrupt-cells = <0x3>;
+ #interrupt-cells = <3>;
reg = <0x0 0x0b000000 0x0 0x1000>, /*GICD*/
<0x0 0x0b002000 0x0 0x1000>, /*GICC*/
<0x0 0x0b001000 0x0 0x1000>, /*GICH*/
diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
index 84e715aa4310..0bde1303bb9d 100644
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -29,8 +29,8 @@ xo: xo {
};

cpus {
- #address-cells = <0x1>;
- #size-cells = <0x0>;
+ #address-cells = <1>;
+ #size-cells = <0>;

CPU0: cpu@0 {
device_type = "cpu";
@@ -106,8 +106,8 @@ scm {
};

soc: soc {
- #address-cells = <0x1>;
- #size-cells = <0x1>;
+ #address-cells = <1>;
+ #size-cells = <1>;
ranges = <0 0 0 0xffffffff>;
compatible = "simple-bus";

@@ -321,9 +321,9 @@ tlmm: pinctrl@1000000 {
interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
gpio-ranges = <&tlmm 0 0 70>;
- #gpio-cells = <0x2>;
+ #gpio-cells = <2>;
interrupt-controller;
- #interrupt-cells = <0x2>;
+ #interrupt-cells = <2>;

serial_4_pins: serial4-state {
pins = "gpio23", "gpio24";
@@ -666,7 +666,7 @@ intc: interrupt-controller@b000000 {
#address-cells = <1>;
#size-cells = <1>;
interrupt-controller;
- #interrupt-cells = <0x3>;
+ #interrupt-cells = <3>;
reg = <0x0b000000 0x1000>, <0x0b002000 0x1000>;
ranges = <0 0xb00a000 0xffd>;

diff --git a/arch/arm64/boot/dts/qcom/msm8953.dtsi b/arch/arm64/boot/dts/qcom/msm8953.dtsi
index 602cb188a635..eeebdab58c04 100644
--- a/arch/arm64/boot/dts/qcom/msm8953.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8953.dtsi
@@ -1505,8 +1505,8 @@ apcs: mailbox@b011000 {
timer@b120000 {
compatible = "arm,armv7-timer-mem";
reg = <0x0b120000 0x1000>;
- #address-cells = <0x01>;
- #size-cells = <0x01>;
+ #address-cells = <1>;
+ #size-cells = <1>;
ranges;

frame@b121000 {
diff --git a/arch/arm64/boot/dts/qcom/qcs404-evb-4000.dts b/arch/arm64/boot/dts/qcom/qcs404-evb-4000.dts
index 59702ba24f35..358827c2fbd3 100644
--- a/arch/arm64/boot/dts/qcom/qcs404-evb-4000.dts
+++ b/arch/arm64/boot/dts/qcom/qcs404-evb-4000.dts
@@ -27,8 +27,8 @@ &ethernet {
phy-handle = <&phy1>;
phy-mode = "rgmii";
mdio {
- #address-cells = <0x1>;
- #size-cells = <0x0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
compatible = "snps,dwmac-mdio";
phy1: phy@4 {
compatible = "ethernet-phy-ieee802.3-c22";
diff --git a/arch/arm64/boot/dts/qcom/sa8155p-adp.dts b/arch/arm64/boot/dts/qcom/sa8155p-adp.dts
index 029b23198b3a..ac52a8dfeba1 100644
--- a/arch/arm64/boot/dts/qcom/sa8155p-adp.dts
+++ b/arch/arm64/boot/dts/qcom/sa8155p-adp.dts
@@ -353,8 +353,8 @@ &ethernet {

mdio {
compatible = "snps,dwmac-mdio";
- #address-cells = <0x1>;
- #size-cells = <0x0>;
+ #address-cells = <1>;
+ #size-cells = <0>;

/* Micrel KSZ9031RNZ PHY */
rgmii_phy: phy@7 {
--
2.40.0