Re: [PATCH 1/1] gpio-f7188x: fix pin count on nct6116d bank 7

[Simon Guinot]

On Tue, Apr 25, 2023 at 05:39:11PM +0200, Henning Schild wrote:
> The count was wrong because i looked at the wrong spec for the chip in
> question. I now got access to the spec for that very chip and group7 has
> all 8 pins, just like the other groups.

Did you use the NCT6102D / NCT6106D datasheet in a first place ?

If the only difference with NCT6116D is the number of pins on port
GPIO-7, then maybe we should handle it and claim support for this models
as well ?

Simon
 
> 
> Fixes: d0918a84aff0 ("gpio-f7188x: Add GPIO support for Nuvoton NCT6116")
> Reported-by: Xing Tong Wu <xingtong.wu@xxxxxxxxxxx>
> Signed-off-by: Henning Schild <henning.schild@xxxxxxxxxxx>
> ---
>  drivers/gpio/gpio-f7188x.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpio/gpio-f7188x.c b/drivers/gpio/gpio-f7188x.c
> index 9effa7769bef..05c0edc4778f 100644
> --- a/drivers/gpio/gpio-f7188x.c
> +++ b/drivers/gpio/gpio-f7188x.c
> @@ -282,7 +282,7 @@ static struct f7188x_gpio_bank nct6116d_gpio_bank[] = {
>  	F7188X_GPIO_BANK(40, 8, 0xF0, DRVNAME "-4"),
>  	F7188X_GPIO_BANK(50, 8, 0xF4, DRVNAME "-5"),
>  	F7188X_GPIO_BANK(60, 8, 0xF8, DRVNAME "-6"),
> -	F7188X_GPIO_BANK(70, 1, 0xFC, DRVNAME "-7"),
> +	F7188X_GPIO_BANK(70, 8, 0xFC, DRVNAME "-7"),
>  };
>  
>  static int f7188x_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
> -- 
> 2.39.2

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