Re: [RFC PATCH 2/2] arm64: dts: ti: k3-j721s2: Add overlay to enable main CPSW2G with GESI

[Siddharth Vadapalli]

On 26/04/23 18:30, Nishanth Menon wrote:
> On 16:27-20230426, Siddharth Vadapalli wrote:
>> From: Kishon Vijay Abraham I <kishon@xxxxxx>
>>
>> The MAIN CPSW2G instance of CPSW on J721S2 SoC can be enabled with the GESI
>> Expansion Board connected to the J7 Common-Proc-Board. Use the overlay
>> to enable this.
>>
>> Add alias for the MAIN CPSW2G port to enable kernel to fetch MAC address
>> directly from U-Boot.
>>
>> Signed-off-by: Kishon Vijay Abraham I <kishon@xxxxxx>
>> Signed-off-by: Siddharth Vadapalli <s-vadapalli@xxxxxx>
>> ---
>>  arch/arm64/boot/dts/ti/Makefile               |  2 +
>>  .../dts/ti/k3-j721s2-evm-gesi-exp-board.dtso  | 83 +++++++++++++++++++
>>  2 files changed, 85 insertions(+)
>>  create mode 100644 arch/arm64/boot/dts/ti/k3-j721s2-evm-gesi-exp-board.dtso
>>
>> diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
>> index c83c9d772b81..13db9b8dbe1d 100644
>> --- a/arch/arm64/boot/dts/ti/Makefile
>> +++ b/arch/arm64/boot/dts/ti/Makefile
>> @@ -42,6 +42,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-j721e-sk.dtb
>>  # Boards with J721s2 SoC
>>  dtb-$(CONFIG_ARCH_K3) += k3-am68-sk-base-board.dtb
>>  dtb-$(CONFIG_ARCH_K3) += k3-j721s2-common-proc-board.dtb
>> +dtb-$(CONFIG_ARCH_K3) += k3-j721s2-evm-gesi-exp-board.dtbo
>>  
>>  # Boards with J784s4 SoC
>>  dtb-$(CONFIG_ARCH_K3) += k3-am69-sk.dtb
>> @@ -49,3 +50,4 @@ dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm.dtb
>>  
>>  # Enable support for device-tree overlays
>>  DTC_FLAGS_k3-am6548-iot2050-advanced-m2 += -@
>> +DTC_FLAGS_k3-j721s2-common-proc-board += -@
>> diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-evm-gesi-exp-board.dtso b/arch/arm64/boot/dts/ti/k3-j721s2-evm-gesi-exp-board.dtso
>> new file mode 100644
>> index 000000000000..2ec08754bf04
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/ti/k3-j721s2-evm-gesi-exp-board.dtso
>> @@ -0,0 +1,83 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +/**
>> + * DT Overlay for MAIN CPSW2G using GESI Expansion Board with J7 common processor board.
>> + *
> 
> product link please.

Thank you for pointing it out. I will update this patch with the product link in
the v2 RFC series.

> 
>> + * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
>> + */
>> +
>> +/dts-v1/;
>> +/plugin/;
>> +
>> +#include <dt-bindings/gpio/gpio.h>
>> +#include <dt-bindings/net/ti-dp83867.h>
>> +
>> +#include "k3-pinctrl.h"
>> +

[...]

>> +
>> +&main_cpsw_port1 {
>> +	status = "okay";
>> +	phy-mode = "rgmii-rxid";
>> +	phy-handle = <&main_cpsw_phy0>;
>> +};
>> -- 
>> 2.25.1
>>
> 

-- 
Regards,
Siddharth.