[PATCH 2/4] RISC-V: don't parse dt isa string to get rv32/rv64

[Heiko Stuebner]

From: Heiko Stuebner <heiko.stuebner@xxxxxxxx>

When filling hwcap the kernel already expects the isa string to start with
rv32 if CONFIG_32BIT and rv64 if CONFIG_64BIT.

So when recreating the runtime isa-string we can also just go the other way
to get the correct starting point for it.

Signed-off-by: Heiko Stuebner <heiko.stuebner@xxxxxxxx>
---
 arch/riscv/kernel/cpu.c | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c
index ebc478f0a16c..06c2f587a176 100644
--- a/arch/riscv/kernel/cpu.c
+++ b/arch/riscv/kernel/cpu.c
@@ -244,7 +244,7 @@ static void strcat_isa_ext(char *isa_str)
  */
 static const char base_riscv_exts[13] = "imafdqcbkjpvh";
 
-static char *riscv_create_isa_string(const char *isa)
+static char *riscv_create_isa_string(void)
 {
 	int maxlen = 4;
 	char *isa_str;
@@ -261,7 +261,11 @@ static char *riscv_create_isa_string(const char *isa)
 		return ERR_PTR(-ENOMEM);
 
 	/* Print the rv[64/32] part */
-	strncat(isa_str, isa, 4);
+#if IS_ENABLED(CONFIG_32BIT)
+	strncat(isa_str, "rv32", 4);
+#elif IS_ENABLED(CONFIG_64BIT)
+	strncat(isa_str, "rv64", 4);
+#endif
 
 	for (i = 0; i < sizeof(base_riscv_exts); i++) {
 		if (__riscv_isa_extension_available(NULL, base_riscv_exts[i] - 'a'))
@@ -280,7 +284,7 @@ static void print_isa(struct seq_file *f, const char *isa)
 
 	seq_puts(f, "isa\t\t: ");
 
-	isa_str = riscv_create_isa_string(isa);
+	isa_str = riscv_create_isa_string();
 	if (!IS_ERR(isa_str)) {
 		seq_write(f, isa_str, strlen(isa_str));
 		kfree(isa_str);
-- 
2.39.0