Re: Loongson (and other $ARCHs?) idle VS timer enqueue

From: Frederic Weisbecker
Date: Sat Apr 22 2023 - 10:21:53 EST


On Sat, Apr 22, 2023 at 10:17:00AM +0200, Peter Zijlstra wrote:
> diff --git a/arch/loongarch/kernel/genex.S b/arch/loongarch/kernel/genex.S
> index 44ff1ff64260..5a102ff80de0 100644
> --- a/arch/loongarch/kernel/genex.S
> +++ b/arch/loongarch/kernel/genex.S
> @@ -40,6 +40,7 @@ SYM_FUNC_START(handle_vint)
> ori t0, t0, 0x1f
> xori t0, t0, 0x1f
> bne t0, t1, 1f
> + addi.d t0, t0, 0x20
> LONG_S t0, sp, PT_ERA
> 1: move a0, sp
> move a1, sp

But the interrupts are enabled in C from arch_cpu_idle(), which
only then calls the ASM __arch_cpu_idle(). So if the interrupt happens
somewhere in between the call, the rollback (or fast-forward now)
doesn't apply.

I guess interrupts need to be re-enabled from ASM in the beginning
of __arch_cpu_idle() so that it's part of the fast-forward region.

> diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S
> index b6de8e88c1bd..cd6aae441ad9 100644
> --- a/arch/mips/kernel/genex.S
> +++ b/arch/mips/kernel/genex.S
> @@ -140,6 +140,7 @@ LEAF(__r4k_wait)
> ori k0, 0x1f /* 32 byte rollback region */
> xori k0, 0x1f
> bne k0, k1, \handler
> + addiu k0, 0x20
> MTC0 k0, CP0_EPC
> .set pop
> .endm

The same seem to apply with interrupts being re-enabled by r4k_wait().

Thanks.