Re: [PATCH v2] phy: cadence: Sierra: Add PCIe + SGMII PHY multilink configuration
From: Vinod Koul
Date: Wed Apr 12 2023 - 12:36:43 EST
On 03-04-23, 10:56, Swapnil Jakhade wrote:
> Add register sequences for PCIe + SGMII PHY multilink configuration.
> This has been validated on TI J7 platforms.
Applied, thanks
--
~Vinod