Re: [PATCH v1 1/7] dt-bindings: power: Constrain properties for JH7110 PMU

[Changhuang Liang]

On 2023/4/12 16:35, Krzysztof Kozlowski wrote:
> On 11/04/2023 08:47, Changhuang Liang wrote:
>> When use "starfive,jh7110-pmu-dphy" compatible, do not need the reg and
>> interrupts properties.
[...]
>>  
>>  description: |
>>    StarFive JH7110 SoC includes support for multiple power domains which can be
>> @@ -17,6 +18,7 @@ properties:
>>    compatible:
>>      enum:
>>        - starfive,jh7110-pmu
>> +      - starfive,jh7110-pmu-dphy
> 
> You do here much more than commit msg says.
> 
> Isn'y DPHY a phy? Why is it in power?
> 

OK, I will add more description. This is a power framework used to turn on/off 
DPHY. So it in power, not a phy.

>>  
>>    reg:
>>      maxItems: 1
>> @@ -29,10 +31,18 @@ properties:
>>  
>>  required:
>>    - compatible
>> -  - reg
>> -  - interrupts
>>    - "#power-domain-cells"
>>  
>> +if:
> 
> Put it under allOf (in this place). Will save you one re-indentation later.
> 

OK, will fix it.

>> +  properties:
>> +    compatible:
>> +      contains:
>> +        const: starfive,jh7110-pmu
>> +then:
>> +  required:
>> +    - reg
>> +    - interrupts
>> +
>>  additionalProperties: false
>>  
>>  examples:
>> diff --git a/include/dt-bindings/power/starfive,jh7110-pmu.h b/include/dt-bindings/power/starfive,jh7110-pmu.h
>> index 132bfe401fc8..0bfd6700c144 100644
>> --- a/include/dt-bindings/power/starfive,jh7110-pmu.h
>> +++ b/include/dt-bindings/power/starfive,jh7110-pmu.h
>> @@ -14,4 +14,7 @@
>>  #define JH7110_PD_ISP		5
>>  #define JH7110_PD_VENC		6
>>  
>> +#define JH7110_PD_DPHY_TX	0
>> +#define JH7110_PD_DPHY_RX	1
>> +
>>  #endif
> 
> Best regards,
> Krzysztof
>