Re: [PATCH v6 07/11] x86/smpboot: Disable parallel boot for AMD CPUs

[David Woodhouse]

On Fri, 2023-02-03 at 13:48 -0600, Kim Phillips wrote:
> [    3.204580] [Firmware Bug]: CPU0: APIC id mismatch. Firmware: 0
> APIC: 2


Could it just be that some processors have CPUID leaves above 0xb but
don't actually support 0xb?

What does this do?

--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -1578,6 +1578,18 @@ void __init native_smp_prepare_cpus(unsigned int max_cpus)
 	    cc_platform_has(CC_ATTR_GUEST_STATE_ENCRYPT))
 		do_parallel_bringup = false;
 
+	if (do_parallel_bringup) {
+		/* Check that CPUID 0x0B really does look sane. */
+		unsigned int eax, ebx, ecx, edx;
+
+		cpuid_count(0xb, 0, &eax, &ebx, &ecx, &edx);
+		printk("CPUID 0xB level 0: %x %x %x %x\n", eax, ebx, ecx, edx);
+		if (!eax && !ebx) {
+			pr_info("Disabling parallel bringup because CPUID 0xb looks untrustworthy\n");
+			do_parallel_bringup = false;
+		}
+	}
+
 	if (do_parallel_bringup &&
 	    boot_cpu_has_bug(X86_BUG_NO_PARALLEL_BRINGUP)) {
 		pr_info("Disabling parallel bringup due to CPU bugs\n");

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