Re: [RFT PATCH 05/14] arm64: dts: qcom: sc8280xp: correct TLMM gpio-ranges

[Konrad Dybcio]

On 3.02.2023 00:59, Brian Masney wrote:
> On Fri, Feb 03, 2023 at 12:45:49AM +0100, Konrad Dybcio wrote:
>> On 2.02.2023 23:58, Brian Masney wrote:
>>> On Wed, Feb 01, 2023 at 04:50:56PM +0100, Krzysztof Kozlowski wrote:
>>>> Correct the number of GPIOs in TLMM pin controller.
>>>>
>>>> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
>>>> ---
>>>>  arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2 +-
>>>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>>>
>>>> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
>>>> index fa2d0d7d1367..17e8c26a9ae6 100644
>>>> --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
>>>> +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
>>>> @@ -3533,7 +3533,7 @@ tlmm: pinctrl@f100000 {
>>>>  			#gpio-cells = <2>;
>>>>  			interrupt-controller;
>>>>  			#interrupt-cells = <2>;
>>>> -			gpio-ranges = <&tlmm 0 0 230>;
>>>> +			gpio-ranges = <&tlmm 0 0 228>;
>> Won't that kill the UFS pins?
> 
> For others quick reference, Konrad is talking about this line from
> sa8540p-ride.dts:
> 
> 	reset-gpios = <&tlmm 228 GPIO_ACTIVE_LOW>;
> 
> I noticed that earlier but assumed this was one based. However, looking
> at pinctrl-sc8280xp.c I see gpio0..gpio227 defined.
+ gpio229 is the reset pin for the UFS card slot

Konrad
> 
> Brian
>