Re: [PATCH v3 04/14] rtc: pcf2127: adapt for WD registers at any offset

From: Bruno Thomsen
Date: Sat Jan 07 2023 - 12:00:00 EST


Den tor. 15. dec. 2022 kl. 16.19 skrev Hugo Villeneuve <hugo@xxxxxxxxxxx>:
>
> From: Hugo Villeneuve <hvilleneuve@xxxxxxxxxxxx>
>
> This will simplify the implementation of new variants into this driver.
>
> Signed-off-by: Hugo Villeneuve <hvilleneuve@xxxxxxxxxxxx>

Reviewed-by: Bruno Thomsen <bruno.thomsen@xxxxxxxxx>
Tested-by: Bruno Thomsen <bruno.thomsen@xxxxxxxxx>

> ---
> drivers/rtc/rtc-pcf2127.c | 14 ++++++++++----
> 1 file changed, 10 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/rtc/rtc-pcf2127.c b/drivers/rtc/rtc-pcf2127.c
> index db0cb784c0c9..5d8c06e32dce 100644
> --- a/drivers/rtc/rtc-pcf2127.c
> +++ b/drivers/rtc/rtc-pcf2127.c
> @@ -114,6 +114,8 @@ struct pcf21xx_config {
> unsigned int has_bit_wd_ctl_cd0:1;
> u8 regs_td_base; /* Time/data base registers. */
> u8 regs_alarm_base; /* Alarm function base registers. */
> + u8 reg_wd_ctl; /* Watchdog control register. */
> + u8 reg_wd_val; /* Watchdog value register. */
> };
>
> struct pcf2127 {
> @@ -297,7 +299,7 @@ static int pcf2127_wdt_ping(struct watchdog_device *wdd)
> {
> struct pcf2127 *pcf2127 = watchdog_get_drvdata(wdd);
>
> - return regmap_write(pcf2127->regmap, PCF2127_REG_WD_VAL, wdd->timeout);
> + return regmap_write(pcf2127->regmap, pcf2127->cfg->reg_wd_val, wdd->timeout);
> }
>
> /*
> @@ -331,7 +333,7 @@ static int pcf2127_wdt_stop(struct watchdog_device *wdd)
> {
> struct pcf2127 *pcf2127 = watchdog_get_drvdata(wdd);
>
> - return regmap_write(pcf2127->regmap, PCF2127_REG_WD_VAL,
> + return regmap_write(pcf2127->regmap, pcf2127->cfg->reg_wd_val,
> PCF2127_WD_VAL_STOP);
> }
>
> @@ -380,7 +382,7 @@ static int pcf2127_watchdog_init(struct device *dev, struct pcf2127 *pcf2127)
> watchdog_set_drvdata(&pcf2127->wdd, pcf2127);
>
> /* Test if watchdog timer is started by bootloader */
> - ret = regmap_read(pcf2127->regmap, PCF2127_REG_WD_VAL, &wdd_timeout);
> + ret = regmap_read(pcf2127->regmap, pcf2127->cfg->reg_wd_val, &wdd_timeout);
> if (ret)
> return ret;
>
> @@ -664,6 +666,8 @@ static struct pcf21xx_config pcf21xx_cfg[] = {
> .has_bit_wd_ctl_cd0 = 1,
> .regs_td_base = PCF2127_REG_TIME_DATE_BASE,
> .regs_alarm_base = PCF2127_REG_ALARM_BASE,
> + .reg_wd_ctl = PCF2127_REG_WD_CTL,
> + .reg_wd_val = PCF2127_REG_WD_VAL,
> },
> [PCF2129] = {
> .max_register = 0x19,
> @@ -671,6 +675,8 @@ static struct pcf21xx_config pcf21xx_cfg[] = {
> .has_bit_wd_ctl_cd0 = 0,
> .regs_td_base = PCF2127_REG_TIME_DATE_BASE,
> .regs_alarm_base = PCF2127_REG_ALARM_BASE,
> + .reg_wd_ctl = PCF2127_REG_WD_CTL,
> + .reg_wd_val = PCF2127_REG_WD_VAL,
> },
> };
>
> @@ -772,7 +778,7 @@ static int pcf2127_probe(struct device *dev, struct regmap *regmap,
> * as T. Bits labeled as T must always be written with
> * logic 0.
> */
> - ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_WD_CTL,
> + ret = regmap_update_bits(pcf2127->regmap, pcf2127->cfg->reg_wd_ctl,
> PCF2127_BIT_WD_CTL_CD1 |
> PCF2127_BIT_WD_CTL_CD0 |
> PCF2127_BIT_WD_CTL_TF1 |
> --
> 2.30.2
>