[PATCH v2 2/2] Documentation: add Marvell MHU driver bindings

From: Wojciech Zmuda
Date: Tue Jan 03 2023 - 10:57:47 EST


From: Wojciech Bartczak <wbartczak@xxxxxxxxxxx>

Marvell Message Handling Unit is a mailbox controller present in
Marvell OcteonTx and OcteonTX2 SoC family.

Signed-off-by: Wojciech Bartczak <wbartczak@xxxxxxxxxxx>
Signed-off-by: Wojciech Zmuda <wzmuda@xxxxxxxxxxx>
---
.../bindings/mailbox/marvell,mvl-mhu.yml | 67 +++++++++++++++++++
MAINTAINERS | 1 +
2 files changed, 68 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mailbox/marvell,mvl-mhu.yml

diff --git a/Documentation/devicetree/bindings/mailbox/marvell,mvl-mhu.yml b/Documentation/devicetree/bindings/mailbox/marvell,mvl-mhu.yml
new file mode 100644
index 000000000000..e06a17eab0f9
--- /dev/null
+++ b/Documentation/devicetree/bindings/mailbox/marvell,mvl-mhu.yml
@@ -0,0 +1,67 @@
+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mailbox/marvell,mvl-mhu.yml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Marvell Message Handling Unit driver
+
+maintainers:
+ - Sujeet Baranwal <sbaranwal@xxxxxxxxxxx>
+ - Sunil Goutham <sgoutham@xxxxxxxxxxx>
+ - Wojciech Bartczak <wbartczak@xxxxxxxxxxx>
+
+description:
+ The Control-Processors Cluster (CPC) provides Arm-platform specification
+ entities for managing the system. On of the CPC processors is the System
+ Control Processor (SCP). The SCP is responsible, among others, for booting
+ the chip, clock and power initialization, controlling power consumption
+ through DVFS, monitoring temperature sensors and controlling AVS. The SCP,
+ as each XCP, contains mailboxes for software-to-software communications.
+ Mailbox writes cause an interrupt to the local XCP core or to the AP.
+ This driver exposes AP-SCP Message Handling Unit to the system, providing
+ the mailbox communication mechanism to the system, with the intention
+ of plugging into the SCMI framework. It is designed to work with Marvell
+ OcteonTX and OcteonTX2-based platforms.
+ Mailbox has no other usage than SCMI communication. In case of
+ configurations running without SCMI support it should be disabled.
+
+properties:
+ compatible:
+ items:
+ - const: marvell,mbox
+
+ reg:
+ maxItems: 1
+
+ "#mbox-cells":
+ description: Index of the channel
+ const: 1
+
+required:
+ - "#mbox-cells"
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+ / {
+ mailbox: mailbox@28,0 {
+ compatible = "marvell,mbox";
+ #mbox-cells = <1>;
+ reg = <0xE000 0 0 0 0>;/* DEVFN = 0xE0 (1C:0) */
+ };
+
+ /* ... */
+
+ firmware {
+ scmi {
+ compatible = "arm,scmi";
+ mboxes = <&mailbox 0>;
+ mbox-names = "scp_ap";
+ /* ... */
+ };
+ };
+ };
+
diff --git a/MAINTAINERS b/MAINTAINERS
index 650a198cce24..e53f001a15c3 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -11328,6 +11328,7 @@ M: Sunil Goutham <sgoutham@xxxxxxxxxxx>
M: Wojciech Bartczak <wbartczak@xxxxxxxxxxx>
L: linux-kernel@xxxxxxxxxxxxxxx
S: Maintained
+F: Documentation/devicetree/bindings/mailbox/marvell,mvl-mhu.yml
F: drivers/mailbox/mvl_mhu.c

MATROX FRAMEBUFFER DRIVER
--
2.17.1