Re: [RESEND PATCH v4] arm64: dts: mt8195: Add Ethernet controller
From: AngeloGioacchino Del Regno
Date: Wed Dec 21 2022 - 05:13:23 EST
Il 21/12/22 03:25, Biao Huang ha scritto:
Add Ethernet controller node for mt8195.
Signed-off-by: Biao Huang <biao.huang@xxxxxxxxxxxx>
---
arch/arm64/boot/dts/mediatek/mt8195-demo.dts | 88 ++++++++++++++++++++
arch/arm64/boot/dts/mediatek/mt8195.dtsi | 86 +++++++++++++++++++
2 files changed, 174 insertions(+)
..snip..
diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index 5d31536f4c48..02112bbf2bdf 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
@@ -1046,6 +1046,92 @@ spis1: spi@1101e000 {
status = "disabled";
};
+ eth: ethernet@11021000 {
+ compatible = "mediatek,mt8195-gmac", "snps,dwmac-5.10a";
+ reg = <0 0x11021000 0 0x4000>;
+ interrupts = <GIC_SPI 716 IRQ_TYPE_LEVEL_HIGH 0>;
+ interrupt-names = "macirq";
+ clock-names = "axi",
+ "apb",
+ "mac_cg",
mac_cg goes as last clock, as specified in the binding.
Order: axi, apb, mac_main, ptp_ref, rmii_internal, mac_cg.
Please fix.
Regards,
Angelo
+ "mac_main",
+ "ptp_ref",
+ "rmii_internal";
+ clocks = <&pericfg_ao CLK_PERI_AO_ETHERNET>,
+ <&pericfg_ao CLK_PERI_AO_ETHERNET_BUS>,
+ <&pericfg_ao CLK_PERI_AO_ETHERNET_MAC>,
+ <&topckgen CLK_TOP_SNPS_ETH_250M>,
+ <&topckgen CLK_TOP_SNPS_ETH_62P4M_PTP>,
+ <&topckgen CLK_TOP_SNPS_ETH_50M_RMII>;