Re: [PATCH AUTOSEL 5.4 7/9] ACPI / PCI: fix LPIC IRQ model default PCI IRQ polarity

From: Marc Zyngier
Date: Sat Dec 17 2022 - 13:05:29 EST


On Sat, 17 Dec 2022 15:29:45 +0000,
Sasha Levin <sashal@xxxxxxxxxx> wrote:
>
> From: Jianmin Lv <lvjianmin@xxxxxxxxxxx>
>
> [ Upstream commit d0c50cc4b957b2cf6e43cec4998d212b5abe9220 ]
>
> On LoongArch based systems, the PCI devices (e.g. SATA controllers and
> PCI-to-PCI bridge controllers) in Loongson chipsets output high-level
> interrupt signal to the interrupt controller they are connected (see
> Loongson 7A1000 Bridge User Manual v2.00, sec 5.3, "For the bridge chip,
> AC97 DMA interrupts are edge triggered, gpio interrupts can be configured
> to be level triggered or edge triggered as needed, and the rest of the
> interrupts are level triggered and active high."), while the IRQs are
> active low from the perspective of PCI (see Conventional PCI spec r3.0,
> sec 2.2.6, "Interrupts on PCI are optional and defined as level sensitive,
> asserted low."), which means that the interrupt output of PCI devices plugged
> into PCI-to-PCI bridges of Loongson chipset will be also converted to high-level.
> So high level triggered type is required to be passed to acpi_register_gsi()
> when creating mappings for PCI devices.
>
> Signed-off-by: Jianmin Lv <lvjianmin@xxxxxxxxxxx>
> Reviewed-by: Huacai Chen <chenhuacai@xxxxxxxxxxx>
> Signed-off-by: Marc Zyngier <maz@xxxxxxxxxx>
> Link: https://lore.kernel.org/r/20221022075955.11726-2-lvjianmin@xxxxxxxxxxx
> Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>
> ---
> drivers/acpi/pci_irq.c | 6 ++++--
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/acpi/pci_irq.c b/drivers/acpi/pci_irq.c
> index dea8a60e18a4..7b843a70f33d 100644
> --- a/drivers/acpi/pci_irq.c
> +++ b/drivers/acpi/pci_irq.c
> @@ -399,13 +399,15 @@ int acpi_pci_irq_enable(struct pci_dev *dev)
> u8 pin;
> int triggering = ACPI_LEVEL_SENSITIVE;
> /*
> - * On ARM systems with the GIC interrupt model, level interrupts
> + * On ARM systems with the GIC interrupt model, or LoongArch
> + * systems with the LPIC interrupt model, level interrupts
> * are always polarity high by specification; PCI legacy
> * IRQs lines are inverted before reaching the interrupt
> * controller and must therefore be considered active high
> * as default.
> */
> - int polarity = acpi_irq_model == ACPI_IRQ_MODEL_GIC ?
> + int polarity = acpi_irq_model == ACPI_IRQ_MODEL_GIC ||
> + acpi_irq_model == ACPI_IRQ_MODEL_LPIC ?
> ACPI_ACTIVE_HIGH : ACPI_ACTIVE_LOW;
> char *link = NULL;
> char link_desc[16];

This cannot even compile, as the *architecture* is not even supported
in 5.4.

Please drop this patch.

M.

--
Without deviation from the norm, progress is not possible.