Re: [PATCH] riscv: avoid enabling vectorized code generation

[Palmer Dabbelt]

On Fri, 16 Dec 2022 11:45:21 PST (-0800), ben.dooks@xxxxxxxxxxxxxxx wrote:
> On 2022-12-16 18:50, Saleem Abdulrasool wrote:
> > The compiler is free to generate vectorized operations for zero'ing
> > memory.  The kernel does not use the vector unit on RISCV, similar to
> > architectures such as x86 where we use `-mno-mmx` et al to prevent the
> > implicit vectorization.  Perform a similar check for
> > `-mno-implicit-float` to avoid this on RISC-V targets.
>
> I'm not sure if we should be emitting either of the vector or floating
> point instrucitons in the kernel without explicitly marking the section
> of code which is using them such as specific accelerator blocks.

Yep, we can't let the compiler just blindly enable V or F/D.  V would 
very much break things as we have no support, but even when that's in 
we'll we at roughly the same spot as F/D are now where we need to handle 
the lazy save/restore bits.

This looks like an LLVM-only option, I see at least some handling here

https://github.com/llvm/llvm-project/blob/a72883b7612f5c00b592da85ed2f1fd81258cc08/clang/lib/Driver/ToolChains/Clang.cpp#L2098

but I don't really know LLVM enough to understand if there's some 
default for `-mimplicit-float` and I can't find anything in the docs.  
If it can be turned on by default and that results in F/D/V instructions 
then we'll need to explicitly turn it off, and that would need to be 
backported.

Maybe Nick or Nathan knows what's up here?